SLLSEQ0C august   2015  – may 2023 ISO5852S

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Description (continued)
  7. 6 Pin Configuration and Function
  8. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Power Ratings
    6. 7.6  Insulation Specifications
    7. 7.7  Safety-Related Certifications
    8. 7.8  Safety Limiting Values
    9. 7.9  Electrical Characteristics
    10. 7.10 Switching Characteristics
    11. 7.11 Insulation Characteristics Curves
    12. 7.12 Typical Characteristics
  9. 8 Parameter Measurement Information
  10. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Supply and Active Miller Clamp
      2. 9.3.2 Active Output Pulldown
      3. 9.3.3 Undervoltage Lockout (UVLO) With Ready (RDY) Pin Indication Output
      4. 9.3.4 Soft Turnoff, Fault ( FLT) and Reset ( RST)
      5. 9.3.5 Short Circuit Clamp
    4. 9.4 Device Functional Modes
  11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Applications
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1  Recommended ISO5852S Application Circuit
        2. 10.2.2.2  FLT and RDY Pin Circuitry
        3. 10.2.2.3  Driving the Control Inputs
        4. 10.2.2.4  Local Shutdown and Reset
        5. 10.2.2.5  Global-Shutdown and Reset
        6. 10.2.2.6  Auto-Reset
        7. 10.2.2.7  DESAT Pin Protection
        8. 10.2.2.8  DESAT Diode and DESAT Threshold
        9. 10.2.2.9  Determining the Maximum Available, Dynamic Output Power, POD-max
        10. 10.2.2.10 Example
        11. 10.2.2.11 Higher Output Current Using an External Current Buffer
      3. 10.2.3 Application Curves
  12. 11Power Supply Recommendations
  13. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
    3. 12.3 PCB Material
  14. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Third-Party Products Disclaimer
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 Support Resources
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  15. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

4 Revision History

Changes from Revision B (January 2017) to Revision C (May 2023)

  • Added Additional manufacturing certification pending to Safety-Related Certifications tableGo

Changes from Revision A (September 2015) to Revision B (January 2017)

  • Changed the title of the data sheet from Active Safety Features to Active Protection Features Go
  • Changed Feature From: Surge Immunity 12800-VPK (according to IEC 61000-4-5) To: Isolation Surge Withstand Voltage 12800-VPK Go
  • Changed the minimum external tracking (creepage) parameter to the external creepage parameterGo
  • Changed the input-to-output test voltage parameter to the apparent charge parameterGo
  • Added the climatic category to the Insulation Specifications tableGo
  • Changed the CSA status from planned to certifiedGo
  • Added text ", but connecting CLAMP output of the gate driver to the IGBT gate is also not an issue." to Supply and Active Miller Clamp Go
  • Changed the second paragraph of the Typical Applications Go
  • Added text "and RST input signal" to the Design Requirements Go

Changes from Revision * (July 2015) to Revision A (September 2015)

  • Moved Features: "100-kV/μs Minimum Common-Mode Transient Immunity.." to the top of the list Go
  • Changed from a 1-page Product Preview to the full datasheet. Go
  • Changed text "single 3-V To: 5.5-V supply" to "single 2.25-V to 5.5-V supply" in the Description Go
  • Changed text "IGBT is in an overload condition" To: "IGBT is in an overcurrent condition" in the Description Go
  • Changed text "and reduces the voltage at OUTL over a minimum time span of 2 μs" To: "and pulls OUTL to low over a time span of 2 μs" in the Description Go
  • Changed the Functional Block Diagram, added STO on pin OUTLGo
  • Changed paragraph 3 of the Description Go
  • Changed the minimum air gap (clearance) parameter to the external clearance parameterGo