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ISO5852S

ACTIVE

5.7kVrms, 2.5A/5A single-channel isolated gate driver w/ split output, STO & protection features

ISO5852S

ACTIVE

Product details

Number of channels 1 Isolation rating Reinforced Power switch IGBT, MOSFET Withstand isolation voltage (VISO) (Vrms) 5700 Working isolation voltage (VIOWM) (Vrms) 1500 Transient isolation voltage (VIOTM) (VPK) 8000 Peak output current (A) 5 Peak output current (source) (typ) (A) 2.5 Peak output current (sink) (typ) (A) 5 Features Active miller clamp, Fault reporting, Power good, Short circuit protection, Soft turn-off, Split output Output VCC/VDD (min) (V) 15 Output VCC/VDD (max) (V) 30 Input supply voltage (min) (V) 2.25 Input supply voltage (max) (V) 5.5 Propagation delay time (µs) 0.076 Input threshold CMOS Operating temperature range (°C) -40 to 125 Rating Catalog Bootstrap supply voltage (max) (V) 2121 Rise time (ns) 18 Fall time (ns) 20 Undervoltage lockout (typ) (V) 12
Number of channels 1 Isolation rating Reinforced Power switch IGBT, MOSFET Withstand isolation voltage (VISO) (Vrms) 5700 Working isolation voltage (VIOWM) (Vrms) 1500 Transient isolation voltage (VIOTM) (VPK) 8000 Peak output current (A) 5 Peak output current (source) (typ) (A) 2.5 Peak output current (sink) (typ) (A) 5 Features Active miller clamp, Fault reporting, Power good, Short circuit protection, Soft turn-off, Split output Output VCC/VDD (min) (V) 15 Output VCC/VDD (max) (V) 30 Input supply voltage (min) (V) 2.25 Input supply voltage (max) (V) 5.5 Propagation delay time (µs) 0.076 Input threshold CMOS Operating temperature range (°C) -40 to 125 Rating Catalog Bootstrap supply voltage (max) (V) 2121 Rise time (ns) 18 Fall time (ns) 20 Undervoltage lockout (typ) (V) 12
SOIC (DW) 16 106.09 mm² (10.3 mm × 10.3 mm)
  • 100-kV/µs Minimum Common-Mode Transient Immunity (CMTI) at V CM = 1500 V
  • Split Outputs to Provide 2.5-A Peak Source and 5-A Peak Sink Currents
  • Short Propagation Delay: 76 ns (Typ), 110 ns (Max)
  • 2-A Active Miller Clamp
  • Output Short-Circuit Clamp
  • Soft Turn-Off (STO) during Short Circuit
  • Fault Alarm upon Desaturation Detection is Signaled on FLT and Reset Through RST
  • Input and Output Undervoltage Lockout (UVLO) with Ready (RDY) Pin Indication
  • Active Output Pulldown and Default Low Outputs with Low Supply or Floating Inputs
  • 2.25-V to 5.5-V Input Supply Voltage
  • 15-V to 30-V Output Driver Supply Voltage
  • CMOS Compatible Inputs
  • Rejects Input Pulses and Noise Transients Shorter Than 20 ns
  • Operating Temperature: –40°C to +125°C Ambient
  • Isolation Surge Withstand Voltage 12800-V PK
  • Safety-Related Certifications:
    • 8000-V PK V IOTM and 2121-V PK V IORM Reinforced Isolation per DIN V VDE V 0884-10 (VDE V 0884-10):2006-12
    • 5700-V RMS Isolation for 1 Minute per UL 1577
    • CSA Component Acceptance Notice 5A, IEC 60950–1 and IEC 60601–1 End Equipment Standards
    • TUV Certification per EN 61010-1 and EN 60950-1
    • GB4943.1-2011 CQC Certification
  • 100-kV/µs Minimum Common-Mode Transient Immunity (CMTI) at V CM = 1500 V
  • Split Outputs to Provide 2.5-A Peak Source and 5-A Peak Sink Currents
  • Short Propagation Delay: 76 ns (Typ), 110 ns (Max)
  • 2-A Active Miller Clamp
  • Output Short-Circuit Clamp
  • Soft Turn-Off (STO) during Short Circuit
  • Fault Alarm upon Desaturation Detection is Signaled on FLT and Reset Through RST
  • Input and Output Undervoltage Lockout (UVLO) with Ready (RDY) Pin Indication
  • Active Output Pulldown and Default Low Outputs with Low Supply or Floating Inputs
  • 2.25-V to 5.5-V Input Supply Voltage
  • 15-V to 30-V Output Driver Supply Voltage
  • CMOS Compatible Inputs
  • Rejects Input Pulses and Noise Transients Shorter Than 20 ns
  • Operating Temperature: –40°C to +125°C Ambient
  • Isolation Surge Withstand Voltage 12800-V PK
  • Safety-Related Certifications:
    • 8000-V PK V IOTM and 2121-V PK V IORM Reinforced Isolation per DIN V VDE V 0884-10 (VDE V 0884-10):2006-12
    • 5700-V RMS Isolation for 1 Minute per UL 1577
    • CSA Component Acceptance Notice 5A, IEC 60950–1 and IEC 60601–1 End Equipment Standards
    • TUV Certification per EN 61010-1 and EN 60950-1
    • GB4943.1-2011 CQC Certification

The ISO5852S device is a 5.7-kV RMS, reinforced isolated gate driver for IGBTs and MOSFETs with split outputs, OUTH and OUTL, providing 2.5-A source and 5-A sink current. The input side operates from a single 2.25-V to 5.5-V supply. The output side allows for a supply range from minimum 15 V to maximum 30 V. Two complementary CMOS inputs control the output state of the gate driver. The short propagation time of 76 ns provides accurate control of the output stage.

An internal desaturation (DESAT) fault detection recognizes when the IGBT is in an overcurrent condition. Upon a DESAT detect, a mute logic immediately blocks the output of the isolator and initiates a soft-turnoff procedure which disables the OUTH pin and pulls the OUTL pin to low over a time span of 2 µs. When the OUTL pin reaches 2 V with respect to the most-negative supply potential, V EE2, the gate-driver output is pulled hard to the V EE2 potential, turning the IGBT immediately off.

When desaturation is active, a fault signal is sent across the isolation barrier, pulling the FLT output at the input side low and blocking the isolator input. Mute logic is activated through the soft-turnoff period. The FLT output condition is latched and can be reset only after the RDY pin goes high, through a low-active pulse at the RST input.

When the IGBT is turned off during normal operation with a bipolar output supply, the output is hard clamp to V EE2. If the output supply is unipolar, an active Miller clamp can be used, allowing Miller current to sink across a low-impedance path which prevents the IGBT from dynamic turnon during high-voltage transient conditions.

The readiness for the gate driver to be operated is under the control of two undervoltage-lockout circuits monitoring the input-side and output-side supplies. If either side has insufficient supply, the RDY output goes low, otherwise this output is high.

The ISO5852S device is available in a 16-pin SOIC package. Device operation is specified over a temperature range from –40°C to +125°C ambient.

The ISO5852S device is a 5.7-kV RMS, reinforced isolated gate driver for IGBTs and MOSFETs with split outputs, OUTH and OUTL, providing 2.5-A source and 5-A sink current. The input side operates from a single 2.25-V to 5.5-V supply. The output side allows for a supply range from minimum 15 V to maximum 30 V. Two complementary CMOS inputs control the output state of the gate driver. The short propagation time of 76 ns provides accurate control of the output stage.

An internal desaturation (DESAT) fault detection recognizes when the IGBT is in an overcurrent condition. Upon a DESAT detect, a mute logic immediately blocks the output of the isolator and initiates a soft-turnoff procedure which disables the OUTH pin and pulls the OUTL pin to low over a time span of 2 µs. When the OUTL pin reaches 2 V with respect to the most-negative supply potential, V EE2, the gate-driver output is pulled hard to the V EE2 potential, turning the IGBT immediately off.

When desaturation is active, a fault signal is sent across the isolation barrier, pulling the FLT output at the input side low and blocking the isolator input. Mute logic is activated through the soft-turnoff period. The FLT output condition is latched and can be reset only after the RDY pin goes high, through a low-active pulse at the RST input.

When the IGBT is turned off during normal operation with a bipolar output supply, the output is hard clamp to V EE2. If the output supply is unipolar, an active Miller clamp can be used, allowing Miller current to sink across a low-impedance path which prevents the IGBT from dynamic turnon during high-voltage transient conditions.

The readiness for the gate driver to be operated is under the control of two undervoltage-lockout circuits monitoring the input-side and output-side supplies. If either side has insufficient supply, the RDY output goes low, otherwise this output is high.

The ISO5852S device is available in a 16-pin SOIC package. Device operation is specified over a temperature range from –40°C to +125°C ambient.

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Technical documentation

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* Data sheet ISO5852S High-CMTI 2.5-A and 5-A Reinforced Isolated IGBT, MOSFET Gate Driver With Split Outputs and Active Protection Features datasheet (Rev. C) PDF | HTML May 30, 2023
Certificate VDE Certificate for Reinforced Isolation for DIN EN IEC 60747-17 (Rev. AB) Jul 15, 2026
EVM User's guide UCC2181xx, UCC217xx, and ISO5x5x Evaluation Module (Rev. A) PDF | HTML Jun 8, 2026
White paper High-voltage reinforced isolation: Definitions and test methodologies (Rev. A) PDF | HTML May 12, 2026
Certificate TUV Certificate for Isolation Devices (Rev. M) May 7, 2026
Certificate UL Certificate of Compliance File E181974 Vol 4 Sec 6 (Rev. S) May 7, 2026
Application brief Does My Design Need a Miller Clamp? PDF | HTML Dec 11, 2024
Application note Choosing Appropriate Protection Approach for IGBT and SiC Power Modules PDF | HTML Jul 19, 2024
Application note Digital Isolator Design Guide (Rev. G) PDF | HTML Sep 13, 2023
White paper Circuit Board Insulation Design According to IEC60664 for Motor Drive Apps PDF | HTML Aug 31, 2023
Certificate ISO5451 CQC Certificate of Product Certification PDF | HTML Aug 16, 2023
Application note Comparative Analysis of Two Different Methods for Gate-Drive Current Boosting (Rev. A) PDF | HTML Feb 17, 2022
Application brief The Use and Benefits of Ferrite Beads in Gate Drive Circuits PDF | HTML Dec 16, 2021
Certificate CSA Certification (Rev. Q) Jun 14, 2021
Application brief External Gate Resistor Selection Guide (Rev. A) Feb 28, 2020
Application brief Understanding Peak IOH and IOL Currents (Rev. A) Feb 28, 2020
White paper Power Electronics in Motor Drives: Where is it? (Rev. A) Oct 1, 2019
Technical article Designing highly efficient, powerful and fast EV charging stations PDF | HTML Aug 6, 2019
Analog design Journal Pushing the envelope with high-performance digital-isolation technology (Rev. A) Aug 22, 2018
Functional safety information Isolation in solar power converters: Understanding the IEC62109-1 safety standar (Rev. A) May 18, 2018
Technical article Why capacitive isolation: a vital building block for sensors in smart cities PDF | HTML Jan 16, 2018
Application note Isolation Glossary (Rev. A) Sep 19, 2017
Technical article Understanding isolator failure modes for safe isolation PDF | HTML Mar 28, 2016
Technical article 7 steps to choose the right isolators for AC motor-drive applications PDF | HTML Nov 24, 2015
Analog design Journal Common-mode transient immunity for isolated gate drivers Oct 30, 2015
Analog design Journal 4Q 2015 Analog Applications Journal Oct 30, 2015
White paper Isolation in AC Motor Drives: Understanding the IEC 61800-5-1 Safety Standard (Rev. B) Sep 25, 2015
White paper Understanding electromagnetic compliance tests in digital isolators Oct 17, 2014
Application note Shelf-Life Evaluation of Lead-Free Component Finishes May 24, 2004

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

ISO5852SDWEVM-017 — Driving and Protection Evaluation Board for SiC and IGBT Power Modules

The ISO5852SDWEVM-017 is a compact, dual chanel isolated gate driver board providing drive, bias voltages, protection and diagnostic needed for half-bridge Sic MOSFET and IGBT Power Modules in standard 62-mm package. This TI EVM is based on 5.7-kVrms reinforced isolation driver IC ISO5852SDW in (...)

User guide: PDF | HTML
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Evaluation board

ISO5852SEVM — Reinforced Isolated IGBT Gate Driver Evaluation Module

This evaluation module, featuring ISO5852S reinforced isolated gate driver device, allows designers to evaluate device AC and DC performance with a pre-populated 1-nF load or with a user-installed IGBT in either of the standard TO-247 or TO-220 packages.

User guide: PDF
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Simulation model

ISO5852S IBIS Model

SLLM283.ZIP (33 KB) - IBIS model
Supported products & hardware
Simulation model

ISO5852S PSpice Transient Model (Rev. A)

SLLM300A.ZIP (232 KB) - PSpice model
Supported products & hardware
Simulation model

ISO5852S TINA-TI Reference Design

SLLM436.TSC (1537 KB) - TINA-TI reference design
Supported products & hardware
Simulation model

ISO5852S TINA-TI SPICE Model

SLLM435.ZIP (31 KB) - TINA-TI Spice model
Supported products & hardware
Simulation model

ISO5852S Unencrypted PSPICE Transient Model

SLLM446.ZIP (4 KB) - PSpice model
Supported products & hardware
Design tool

SLLR117 — ISO5852SDWEVM-017 Design Files

Supported products & hardware
Reference design

TIDA-00195 — Isolated IGBT Gate Driver Evaluation Platform for 3-Phase Inverter System Reference Design

The TIDA-00195 reference design consists of a 22kW power stage with TI’s new reinforced isolated IGBT gate driver ISO5852S intended for motor control in various applications. This design allows performance evaluation of the ISO5852S in 3-phase inverter incorporating 1200V rated IGBT modules (...)

Supported products & hardware
Reference design

TIDA-00917 — Gate Driver Reference Design for Parallel IGBTs With Short-Circuit Protection and Current Buffer

Paralleling insulated-gate bipolar transistors (IGBTs) becomes necessary for power conversion equipment with higher output power ratings, where a single IGBT cannot provide the required load current. This reference design implements a reinforced isolated IGBT gate control module to drive (...)
Supported products & hardware
Reference design

TIDA-01599 — TÜV SÜD-assessed safe torque off (STO) reference design for industrial drives (IEC 61800-5-2)

This reference design outlines a safe torque off (STO) subsystem for a three-phase inverter with CMOS input isolated IGBT gate drivers. The STO subsystem employs a dual-channel architecture (1oo2) with a hardware fault tolerance of 1 (HFT=1). It is implemented following a de-energize trip concept. (...)
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