SLVSJP6
August 2025
ISOM8110-EP
ADVANCE INFORMATION
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Insulation Specifications
5.6
Safety-Related Certifications
5.7
Safety Limiting Values
5.8
Electrical Characteristics
5.9
Switching Characteristics
6
Parameter Measurement Information
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.4
Device Functional Modes
7.4.1
Active Mode
7.4.2
Saturation Mode
8
Application and Implementation
8.1
Application Information
8.1.1
Typical Application
8.1.1.1
Design Requirements
8.1.1.2
Detailed Design Procedure
8.1.1.2.1
Sizing RPULLUP
8.1.1.2.2
Sizing RIN
8.1.1.3
Application Curves
8.2
Power Supply Recommendations
8.3
Layout
8.3.1
Layout Guidelines
8.3.2
Layout Example
9
Device and Documentation Support
9.1
Documentation Support
9.1.1
Related Documentation
9.2
Receiving Notification of Documentation Updates
9.3
Support Resources
9.4
Trademarks
9.5
Electrostatic Discharge Caution
9.6
Glossary
10
Revision History
11
Mechanical, Packaging, and Orderable Information
11.1
Tape and Reel Information
Package Options
Mechanical Data (Package|Pins)
DFG|4
MPSS148B
Thermal pad, mechanical data (Package|Pins)
Orderable Information
slvsjp6_oa
4
Pin Configuration and Functions
Figure 4-1
ISOM8110-EP
4-Pin SOIC
(Top View)
Table 4-1 Pin Functions
PIN
TYPE
(1)
DESCRIPTION
NO.
NAME
1
AN
I
Anode connection of input LED emulator
2
CAT
I
Cathode connection of input LED emulator
3
EM
O
Emitter for transistor
4
COL
O
Collector for transistor
(1)
I = Input, O = Output