SNVS509F April   2007  – November 2023 LM25116

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 High-Voltage Start-Up Regulator
      2. 6.3.2 Enable
      3. 6.3.3 UVLO
      4. 6.3.4 Oscillator and Sync Capability
      5. 6.3.5 Error Amplifier and PWM Comparator
      6. 6.3.6 Ramp Generator
      7. 6.3.7 Current Limit
      8. 6.3.8 HO Output
      9. 6.3.9 Thermal Protection
    4. 6.4 Device Functional Modes
      1. 6.4.1 Soft Start and Diode Emulation
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1  Timing Resistor
        2. 7.2.2.2  Output Inductor
        3. 7.2.2.3  Current Sense Resistor
        4. 7.2.2.4  Ramp Capacitor
        5. 7.2.2.5  Output Capacitors
        6. 7.2.2.6  Input Capacitors
        7. 7.2.2.7  VCC Capacitor
        8. 7.2.2.8  Bootstrap Capacitor
        9. 7.2.2.9  Soft Start Capacitor
        10. 7.2.2.10 Output Voltage Divider
        11. 7.2.2.11 UVLO Divider
        12. 7.2.2.12 MOSFETs
        13. 7.2.2.13 MOSFET Snubber
        14. 7.2.2.14 Error Amplifier Compensation
        15. 7.2.2.15 Comprehensive Equations
          1. 7.2.2.15.1 Current Sense Resistor and Ramp Capacitor
          2. 7.2.2.15.2 Modulator Transfer Function
          3. 7.2.2.15.3 Error Amplifier Transfer Function
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.2.2.6 Input Capacitors

The regulator supply voltage has a large source impedance at the switching frequency. Good quality input capacitors are necessary to limit the ripple voltage at the VIN pin while supplying most of the switch current during the on-time. When the buck switch turns on, the current into the switch steps to the valley of the inductor current waveform, ramps up to the peak value, and then drops to zero at turnoff. The input capacitors must be selected for RMS current rating and minimum ripple voltage. A good approximation for the required ripple current rating is IRMS > IOUT / 2.

Quality ceramic capacitors with a low ESR were selected for the input filter. To allow for capacitor tolerances and voltage rating, four 2.2-µF ceramic capacitors were used for the typical application circuit. With ceramic capacitors, the input ripple voltage is triangular and peak at 50% duty cycle. Considering the capacitance change with DC bias, the input ripple voltage is approximated with Equation 17.

Equation 17. GUID-EEB5AD40-EC0F-4B63-B819-09A714E6F3F8-low.gif

When the converter is connected to an input power source, a resonant circuit is formed by the line impedance and the input capacitors. If step input voltage transients are expected near the maximum rating of the LM25116, a careful evaluation of the ringing and possible overshoot at the device VIN pin must be completed. To minimize overshoot make CIN > 10 × LIN. The characteristic source impedance and resonant frequency are in Equation 18.

Equation 18. GUID-CAB3EC37-3C40-4427-8D85-46BD205A6DAA-low.gif

The converter exhibits a negative input impedance which is lowest at the minimum input voltage in Equation 19.

Equation 19. GUID-336211E3-023C-4CBD-9D1B-F9F527D9FC93-low.gif

The damping factor for the input filter is given by Equation 20.

Equation 20. GUID-5AC1DCD6-432C-4187-A1F9-8CBE9335E0CB-low.gif

where

  • RIN is the input wiring resistance
  • ESR is the series resistance of the input capacitors

The term ZS / ZIN is always negative due to ZIN. When δ = 1, the input filter is critically damped. This may be difficult to achieve with practical component values. With δ < 0.2, the input filter exhibits significant ringing. If δ is zero or negative, there is not enough resistance in the circuit and the input filter sustains an oscillation. When operating near the minimum input voltage, an aluminum electrolytic capacitor across CIN may be required to damp the input for a typical bench test setup. Any parallel capacitor must be evaluated for its RMS current rating. The current splits between the ceramic and aluminum capacitors based on the relative impedance at the switching frequency.