10.1 Layout Guidelines
High frequency switching regulators require very careful layout of components in order to get stable operation and low noise. All components must be as close as possible to the LM4510 device. Refer to Figure 26 as an example. Some additional guidelines to be observed:
- CIN must be placed close to the device and connected directly from VIN to PGND pins. This reduces copper trace resistance, which affects the input voltage ripple of the device. For additional input voltage filtering, typically a 0.1 uF bypass capacitor can be placed between VIN and AGND. This bypass capacitor should be placed near the device closer than CIN.
- COUT must also be placed close to the device and connected directly from VOUT to PGND pins. Any copper trace connections for the COUT capacitor can increase the series resistance, which directly affects output voltage ripple and makes noise during output voltage sensing.
- All voltage-sensing resistors (RF1, RF2) should be kept close to the FB pin to minimize copper trace connections that can inject noise into the system. The ground connection for the voltage-sensing resistor should be connected directly to the AGND pin.
- Trace connections made to the inductor should be minimized to reduce power dissipation, EMI radiation and increase overall efficiency. Also poor trace connection increases the ripple of SW.
- CS, CC1, CC2, RC must be placed close to the device and connected to AGND.
- The AGND pin should connect directly to the ground. Not connecting the AGND pin directly, as close to the chip as possible, may affect the performance of the LM4510 and limit its current driving capability. AGND and PGND should be separate planes and should be connected at a single point.
- For better thermal performance, DAP should be connected to ground, but cannot be used as the primary ground connection. The PC board land may be modified to a "dog bone" shape to reduce SON thermal impedance. For detail information, refer to Application Note AN-1187.