SNVS961F April   2013  – October 2026 LM5023

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Detailed Pin Description
        1. 6.3.1.1 QR Pin
        2. 6.3.1.2 VSD Pin
        3. 6.3.1.3 SS Pin
        4. 6.3.1.4 COMP Pin
        5. 6.3.1.5 CS Pin
        6. 6.3.1.6 GND Pin
        7. 6.3.1.7 OUT Pin
        8. 6.3.1.8 VCC Pin
      2. 6.3.2 Start-Up
      3. 6.3.3 Quasi-Resonant Operation
      4. 6.3.4 Quasi-Resonant Operating Frequency
      5. 6.3.5 PWM Comparator
      6. 6.3.6 Soft-Start
      7. 6.3.7 Gate Driver
        1. 6.3.7.1 Skip-Cycle Operation
      8. 6.3.8 Current Limit and Current Sense
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Custom Design With WEBENCH® Tools
        2. 7.2.2.2 Line Current-Limit Feedforward
          1. 7.2.2.2.1 Overvoltage Protection
        3. 7.2.2.3 Valley Switching
        4. 7.2.2.4 Hiccup Mode
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 Custom Design With WEBENCH® Tools
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Community Resources
    5. 8.5 Trademarks
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Current Limit and Current Sense

The LM5023 provides a cycle-by-cycle overcurrent protection feature. Current limit is triggered by an internal current sense comparator with a threshold of 500mV. If the CS pin voltage plus the current limit feedforward signal voltage exceeds 500mV, the MOSFET drive signal (OUT) ends. An RC filter, located near the LM5023 CS pin is recommended to attenuate the noise coupled from the gate of the power FET to source switching. The CS pin capacitance is discharged at the end of each PWM cycle by an internal switch. The discharge switch remains on for an additional 130ns for leading edge blanking (LEB). LEB prevents the LM5023 current sense comparator from being falsely triggered due to the noise generated by the switch currents initial spike. The LM5023 current sense comparator is very fast and can respond to short-duration noise pulses. Layout considerations are critical for the current-sense filter and sense resistor. The capacitor associated with the CS filter must be placed very close to the device and connected directly to the pins of the device (CS and GND). If a current sense transformer is used, both leads of the transformer secondary must be routed to the sense resistor, which must also be located close to the device. If a current sense resistor located in the source of the power FET is used for current sense, a low inductance resistor is required. In this case, all of the noise-sensitive low-current grounds must connect in common near the device and then one connection must be made.