SNVSAE4C July 2015 – October 2018 LM5160-Q1
The LM5160-Q1 contains a dual-level undervoltage lockout (EN/UVLO) circuit. When the EN/UVLO voltage is below 0.35 V, the regulator is in a low-current shutdown mode. When the EN/UVLO voltage is greater than 0.35 V (typical) but less than 1.24 V (typical), the regulator is in standby mode. In standby mode, the VCC bias regulator is active but converter switching remains disabled. When the voltage at the VCC exceeds the VCC rising threshold, VCC(UV) = 3.98 V (typical), and the EN/UVLO voltage is greater than 1.24 V, normal switching operation begins. Use an external resistor voltage divider from VIN to GND to set the minimum operating voltage of the regulator.
EN/UVLO hysteresis is implemented with an internal 20 µA (typical) current source (IUVLO(HYS)) that is switched on or off into the impedance of the EN/UVLO pin resistor divider. When the EN/UVLO threshold is exceeded, the current source is activated to effectively raise the voltage at the EN/UVLO pin. The hysteresis is equal to the value of this current times the upper resistance of the resistor divider, RUV2. See Functional Block Diagram.