SNOSDB8A June   2021  – December 2021 LM74701-Q1

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input Voltage
      2. 8.3.2 Charge Pump
      3. 8.3.3 Gate Driver
      4. 8.3.4 Enable
      5. 8.3.5 Battery Voltage Monitoring (SW)
    4. 8.4 Device Functional Modes
      1. 8.4.1 Shutdown Mode
      2. 8.4.2 Conduction Mode
        1. 8.4.2.1 Regulated Conduction Mode
        2. 8.4.2.2 Full Conduction Mode
        3. 8.4.2.3 VDS Clamp Mode
      3. 8.4.3 Reverse Current Protection Mode
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Design Considerations
        2. 9.2.2.2 MOSFET Selection
        3. 9.2.2.3 Charge Pump VCAP (CVCAP) and Input Capacitance (CIN)
        4. 9.2.2.4 Output Capacitance (COUT)
      3. 9.2.3 Application Curves
    3. 9.3 What to Do and What Not to Do
    4. 9.4 OR-ing Application Configuration
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Support Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Layout Guidelines

  • Place the input capacitor close to the ANODE pin to GND. Having smaller ground return path helps with better EMI performance.

  • Connect ANODE, GATE and CATHODE pins of LM74701-Q1 close to the MOSFET's SOURCE, GATE and DRAIN pins.
  • Use thick traces for source and drain of the MOSFET to minimize resistive losses. The high current path for this solution is through the MOSFET.
  • Keep the charge pump capacitor across VCAP and ANODE pins away from the MOSFET to lower the thermal effects on the capacitance value.
  • Connect the GATE pin of the LM74701-Q1 to the MOSFET gate with short trace. Avoid excessively thin and long trace to the Gate Drive.
  • Keep the GATE pin close to the MOSFET to avoid increase in MOSFET turn-off delay due to trace resistance.