SNAS558M February   2000  – July 2016 LMC555

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Low-Power Dissipation
      2. 8.3.2 Various Packages and Compatibility
      3. 8.3.3 Operates in Both Astable and Monostable Mode
    4. 8.4 Device Functional Modes
      1. 8.4.1 Monostable Operation
      2. 8.4.2 Astable Operation
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
    3. 9.3 Frequency Divider
      1. 9.3.1 Design Requirements
      2. 9.3.2 Application Curve
    4. 9.4 Pulse Width Modulator
      1. 9.4.1 Design Requirements
      2. 9.4.2 Application Curve
    5. 9.5 Pulse Position Modulator
      1. 9.5.1 Design Requirements
      2. 9.5.2 Application Curve
    6. 9.6 50% Duty Cycle Oscillator
      1. 9.6.1 Design Requirements
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation SupportChanged layout of National Semiconductor Data Sheet to TI format
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10 Power Supply Recommendations

The LM555 requires a voltage supply within 1.5 V to 15 V. Adequate power supply bypassing is necessary to protect associated circuitry. Minimum recommended is 0.1 μF in parallel with 1-μF electrolytic. Place the bypass capacitors as close as possible to the LM555 and minimize the trace length.