SNAS558M February   2000  – July 2016 LMC555

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Low-Power Dissipation
      2. 8.3.2 Various Packages and Compatibility
      3. 8.3.3 Operates in Both Astable and Monostable Mode
    4. 8.4 Device Functional Modes
      1. 8.4.1 Monostable Operation
      2. 8.4.2 Astable Operation
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
    3. 9.3 Frequency Divider
      1. 9.3.1 Design Requirements
      2. 9.3.2 Application Curve
    4. 9.4 Pulse Width Modulator
      1. 9.4.1 Design Requirements
      2. 9.4.2 Application Curve
    5. 9.5 Pulse Position Modulator
      1. 9.5.1 Design Requirements
      2. 9.5.2 Application Curve
    6. 9.6 50% Duty Cycle Oscillator
      1. 9.6.1 Design Requirements
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation SupportChanged layout of National Semiconductor Data Sheet to TI format
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings

Over operating free-air temperature range, unless otherwise noted.(1)(2)(3)
MIN MAX UNIT
Voltage Supply 15 V
Input –0.3 (V+) + 0.3 V
Output 15 V
Curent Output 100 mA
Storage temperature, Tstg –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) See AN-1112 (SNVA009) for DSBGA considerations.
(3) If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±1500 V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
Temperature Range  LMC555IM −40 125 °C
 LMC555CM/MM/N/TP −40 85 °C
Maximum Allowable Power Dissipation at 25°C    PDIP-8 1126 mW
 SOIC-8 740 mW
 VSSOP-8 555 mW
8-bump DSBGA 568 mW

6.4 Thermal Information

THERMAL METRIC(1) LMC555 UNIT
SOIC VSSOP PDIP 8-BUMP DSBGA
8 PINS 8 PINS 8 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 169 225 111 220 °C/W
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics

Test Circuit, T = 25°C, all switches open, RESET to VS unless otherwise noted(1)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
IS Supply Current VS = 1.5 V
VS = 5 V
VS = 12 V
50
100
150
150
250
400
µA
VCTRL Control Voltage VS = 1.5 V
VS = 5 V
VS = 12 V
0.8
2.9
7.4
1.0
3.3
8.0
1.2
3.8
8.6
V
VDIS Discharge Saturation Voltage VS = 1.5 V, IDIS = 1 mA
VS = 5 V, IDIS = 10 mA
75
150
150
300
mV
VOL Output Voltage (Low) VS = 1.5 V, IO = 1 mA
VS = 5 V, IO = 8 mA
VS = 12 V, IO = 50 mA
0.2
0.3
1.0
0.4
0.6
2.0
V
VOH Output Voltage
(High)
VS = 1.5 V, IO = −0.25 mA
VS = 5 V, IO = −2 mA
VS = 12 V, IO = −10 mA
1.0
4.4
10.5
1.25
4.7
11.3
V
VTRIG Trigger Voltage VS = 1.5V
VS = 12V
0.4
3.7
0.5
4.0
0.6
4.3
V
ITRIG Trigger Current VS = 5V 10 pA
VRES Reset Voltage VS = 1.5 V (2)
VS = 12 V
0.4
0.4
0.7
0.75
1.0
1.1
V
IRES Reset Current VS = 5 V 10 pA
ITHRESH Threshold Current VS = 5 V 10 pA
IDIS Discharge Leakage VS = 12 V 1.0 100 nA
t Timing Accuracy SW 2, 4 Closed
VS = 1.5 V
VS = 5 V
VS = 12 V
0.9
1.0
1.0
1.1
1.1
1.1
1.25
1.20
1.25
ms
Δt/ΔVS Timing Shift with Supply VS = 5V ± 1 V 0.3% V
Δt/ΔT Timing Shift with Temperature VS = 5 V 75 ppm/°C
fA Astable Frequency SW 1, 3 Closed, VS = 12 V 4.0 4.8 5.6 kHz
fMAX Maximum Frequency Max. Freq. Test Circuit, VS = 5 V 3.0 MHz
tR, tF Output Rise and
Fall Times
Max. Freq. Test Circuit
VS = 5V, CL = 10 pF
15 ns
tPD Trigger Propagation Delay VS = 5 V, Measure Delay
from Trigger to Output
100 ns
(1) All voltages are measured with respect to the ground pin, unless otherwise specified.
(2) If the RESET pin is to be used at temperatures of −20°C and below VS is required to be 2.0 V or greater.