SNOSDB6C December   2020  – March 2022 LMP7704-SP

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics: VS = 5 V
    6. 6.6 Electrical Characteristics: VS = 10 V
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Radiation Hardened Performance
      2. 7.3.2 Engineering Model (Devices With /EM Suffix)
      3. 7.3.3 Capacitive Load
      4. 7.3.4 Input Capacitance
      5. 7.3.5 Diodes Between the Inputs
    4. 7.4 Device Functional Modes
      1. 7.4.1 Precision Current Source
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Low Input Voltage Noise
      2. 8.1.2 Total Noise Contribution
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Support Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9 Power Supply Recommendations

For proper operation, the power supplies must be decoupled. To decouple the supply, place 10‑nF to 1‑µF capacitors as close as possible to the operational-amplifier power-supply pins. For single-supply configurations, place a capacitor between the V+ and V– supply pins. For dual-supply configurations, place one capacitor between V+ and ground, and place a second capacitor between V– and ground. Bypass capacitors must have a low ESR of less than 0.1 Ω.