SNOSDB6D December   2020  – October 2024 LMP7704-SP

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics VS = 5 V
    6. 5.6 Electrical Characteristics VS = 10 V
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Radiation Hardened Performance
      2. 6.3.2 Engineering Model (Devices With /EM Suffix)
      3. 6.3.3 Diodes Between the Inputs
      4. 6.3.4 Capacitive Load
      5. 6.3.5 Input Capacitance
    4. 6.4 Device Functional Modes
      1. 6.4.1 Precision Current Source
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Low Input Voltage Noise
      2. 7.1.2 Total Noise Contribution
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • HBH|14
Thermal pad, mechanical data (Package|Pins)
Orderable Information

4 Pin Configuration and Functions

LMP7704-SP HBH Package, 14-Pin CFP (Top View) Figure 4-1 HBH Package, 14-Pin CFP (Top View)
Table 4-1 Pin Functions
PIN TYPE DESCRIPTION
NAME NO.
IN A+ 3 Input Noninverting input for amplifier A
IN A– 2 Input Inverting input for amplifier A
IN B+ 5 Input Noninverting input for amplifier B
IN B– 6 Input Inverting input for amplifier B
IN C+ 10 Input Noninverting input for amplifier C
IN C– 9 Input Inverting input for amplifier C
IN D+ 12 Input Noninverting input for amplifier D
IN D– 13 Input Inverting input for amplifier D
OUT A 1 Output Output for amplifier A
OUT B 7 Output Output for amplifier B
OUT C 8 Output Output for amplifier C
OUT D 14 Output Output for amplifier D
V+ 4 Power Positive supply
V– 11 Power Negative supply
PAD — — Backside thermal pad, internally shorted to LID. Thermally connected to the device substrate, but electrically high-impedance to the substrate. Connect the pad to V– to reduce parasitic capacitance and leakage paths.
LID — — Topside metal lid, internally shorted to PAD.