SNAS521H July   2011  – January 2016 LMP90077 , LMP90078 , LMP90079 , LMP90080

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  ESD Ratings
    3. 8.3  Recommended Operating Conditions
    4. 8.4  Thermal Information
    5. 8.5  Electrical Characteristics
    6. 8.6  Timing Requirements
    7. 8.7  Timing Requirements - CSB Timing
    8. 8.8  Timing Requirements - SCLK and SDI Timing
    9. 8.9  Timing Requirements - SDO Timing With DOD1
    10. 8.10 Timing Requirements - SDO Timing with DOD2
    11. 8.11 Timing Requirements - SDO and DRDYB Timing
    12. 8.12 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Calibration
        1. 9.3.1.1 Background Calibration
          1. 9.3.1.1.1 Types of Background Calibration:
          2. 9.3.1.1.2 Using Background Calibration:
        2. 9.3.1.2 System Calibration
          1. 9.3.1.2.1 System Calibration Offset Coefficient Determination Mode
          2. 9.3.1.2.2 System Calibration Gain Coefficient Determination Mode
          3. 9.3.1.2.3 Post-Calibration Scaling
      2. 9.3.2 True Continuous Background Calibration
      3. 9.3.3 Continuous Background Sensor Diagnostics
      4. 9.3.4 Flexible Input MUX Channels
      5. 9.3.5 Programmable Gain Amplifiers (FGA & PGA)
      6. 9.3.6 Excitation Current Sources (IB1 & IB2) - LMP90080/LMP90078
      7. 9.3.7 Signal Path
        1. 9.3.7.1 Reference Input (VREF)
        2. 9.3.7.2 Flexible Input MUX (VIN)
        3. 9.3.7.3 Selectable Gains (FGA and PGA)
        4. 9.3.7.4 Buffer (BUFF)
        5. 9.3.7.5 Internal/External CLK Selection
        6. 9.3.7.6 Programmable ODRS
        7. 9.3.7.7 Digital Filter
        8. 9.3.7.8 GPIO (D0-D6)
    4. 9.4 Device Functional Modes
      1. 9.4.1 Channels Scan Mode
        1. 9.4.1.1 ScanMode0: Single-Channel Continuous Conversion
        2. 9.4.1.2 ScanMode1: Multiple-Channels Single Scan
        3. 9.4.1.3 ScanMode2: Multiple-Channels Continuous Scan
        4. 9.4.1.4 ScanMode3: Multiple-Channels Continuous Scan with Burnout Currents
      2. 9.4.2 Sensor Interface
        1. 9.4.2.1 IB1 & IB2 - Excitation Currents (LMP90080/LMP90078)
        2. 9.4.2.2 Burnout Currents
          1. 9.4.2.2.1 Burnout Current Injection
        3. 9.4.2.3 Sensor Diagnostic Flags
          1. 9.4.2.3.1 SHORT_THLD_FLAG
          2. 9.4.2.3.2 RAILS_FLAG
          3. 9.4.2.3.3 POR_AFT_LST_RD
          4. 9.4.2.3.4 OFLO_FLAGS
          5. 9.4.2.3.5 SAMPLED_CH
    5. 9.5 Programming
      1. 9.5.1 Serial Digital Interface
        1. 9.5.1.1 Register Address (ADDR)
        2. 9.5.1.2 Register Read/Write Protocol
        3. 9.5.1.3 Streaming
        4. 9.5.1.4 CSB - Chip Select Bar
        5. 9.5.1.5 SPI Reset
        6. 9.5.1.6 DRDYB - Data Ready Bar
          1. 9.5.1.6.1 DrdybCase1: Combining SDO/DRDYB with SDO_DRDYB_DRIVER = 0x00
          2. 9.5.1.6.2 DrdybCase2: Combining SDO/DRDYB with SDO_DRDYB_DRIVER = 0x03
          3. 9.5.1.6.3 DrdybCase3: Routing DRDYB to D6
        7. 9.5.1.7 Data Only Read Transaction
        8. 9.5.1.8 Cyclic Redundancy Check (CRC)
      2. 9.5.2 RESET and RESTART
      3. 9.5.3 Register Read/Write Examples
        1. 9.5.3.1 Writing to Register Examples
        2. 9.5.3.2 Reading from Register Example
      4. 9.5.4 Streaming Examples
        1. 9.5.4.1 Normal Streaming Example
        2. 9.5.4.2 Controlled Streaming Example
    6. 9.6 Register Maps
      1. 9.6.1 Power and Reset Registers
      2. 9.6.2 ADC Registers
      3. 9.6.3 Channel Configuration Registers  
      4. 9.6.4 Calibration Registers
      5. 9.6.5 Sensor Diagnostic Registers
      6. 9.6.6 SPI Registers
      7. 9.6.7 GPIO Registers
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Connecting the Supplies
        1. 10.1.1.1 VA and VIO
        2. 10.1.1.2 VREF
      2. 10.1.2 Quick Start
      3. 10.1.3 ADC_DOUT Calculation
    2. 10.2 Typical Applications
      1. 10.2.1 Typical Sensor Application
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
        3. 10.2.1.3 Application Curve
      2. 10.2.2 3-Wire RTD
        1. 10.2.2.1 Design Requirements
        2. 10.2.2.2 Detailed Design Procedure
        3. 10.2.2.3 Application Curve
      3. 10.2.3 Thermocouple and IC Analog Temperature
        1. 10.2.3.1 Design Requirements
        2. 10.2.3.2 Detailed Design Procedure
        3. 10.2.3.3 Application Curve
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Device Nomenclature
    2. 13.2 Related Links
    3. 13.3 Community Resources
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • 16-Bit Low-Power Sigma Delta ADC
  • True Continuous Background Calibration at All Gains
  • In-Place System Calibration Using Expected Value Programming
  • Low-Noise Programmable Gain (1x - 128x)
  • Continuous Background Open/Short and Out of Range Sensor Diagnostics
  • 8 Output Data Rates (ODR) with Single-Cycle Settling
  • 2 Matched Excitation Current Sources from 100 µA to 1000 µA (LMP90080/LMP90078)
  • 4-DIFF / 7-SE Inputs (LMP90080/LMP90079)
  • 2-DIFF / 4-SE Inputs (LMP90078/LMP90077)
  • 7 General Purpose Input/Output Pins
  • Chopper-Stabilized Buffer for Low Offset
  • SPI 4/3-Wire with CRC Data Link Error Detection
  • 50 Hz to 60 Hz Line Rejection at ODR ≤13.42 SPS
  • Independent Gain and ODR Selection per Channel
  • Supported by WEBENCH® Sensor AFE Designer
  • Automatic Channel Sequencer
  • Key Specifications
    • ENOB/NFR: Up to 16/16 Bits
    • Offset Error (typ): 8.4 nV
    • Gain Error (typ): 7 ppm
    • Total Noise: <10 µV-rms
    • Integral Non-Linearity (INL Max): ±1 LSB
    • Output Data Rates (ODR): 1.6775–214.65 SPS
    • Analog Voltage, VA: 2.85 to 5.5 V
    • Operating Temp Range: –40°C to 125°C
    • Package: 28 Pin Exposed Pad

2 Applications

  • Temperature and Pressure Transmitters
  • Strain Gauge Interface
  • Industrial Process Control

3 Description

The LLMP9007x and LMP90080 are highly integrated, multi-channel, low-power 16-bit Sensor AFEs. The devices feature a precision, 16-bit Sigma Delta Analog-to-Digital Converter (ADC) with a low-noise programmable gain amplifier and a fully differential high impedance analog input multiplexer. A true continuous background calibration feature allows calibration at all gains and output data rates without interrupting the signal path. The background calibration feature essentially eliminates gain and offset errors across temperature and time, providing measurement accuracy without sacrificing speed and power consumption.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
LMP90077 HTSSOP (28) 9.70 mm × 4.40 mm
LMP90078
LMP90079
LMP90080
  1. For all available packages, see the orderable addendum at the end of the datasheet.

Typical Sensor Application

LMP90077 LMP90078 LMP90079 LMP90080 30169774.gif