SNAS521H July   2011  – January 2016 LMP90077 , LMP90078 , LMP90079 , LMP90080


  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Description (continued)
  6. Device Comparison Table
  7. Pin Configuration and Functions
  8. Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  ESD Ratings
    3. 8.3  Recommended Operating Conditions
    4. 8.4  Thermal Information
    5. 8.5  Electrical Characteristics
    6. 8.6  Timing Requirements
    7. 8.7  Timing Requirements - CSB Timing
    8. 8.8  Timing Requirements - SCLK and SDI Timing
    9. 8.9  Timing Requirements - SDO Timing With DOD1
    10. 8.10 Timing Requirements - SDO Timing with DOD2
    11. 8.11 Timing Requirements - SDO and DRDYB Timing
    12. 8.12 Typical Characteristics
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Calibration
        1. Background Calibration
          1. Types of Background Calibration:
          2. Using Background Calibration:
        2. System Calibration
          1. System Calibration Offset Coefficient Determination Mode
          2. System Calibration Gain Coefficient Determination Mode
          3. Post-Calibration Scaling
      2. 9.3.2 True Continuous Background Calibration
      3. 9.3.3 Continuous Background Sensor Diagnostics
      4. 9.3.4 Flexible Input MUX Channels
      5. 9.3.5 Programmable Gain Amplifiers (FGA & PGA)
      6. 9.3.6 Excitation Current Sources (IB1 & IB2) - LMP90080/LMP90078
      7. 9.3.7 Signal Path
        1. Reference Input (VREF)
        2. Flexible Input MUX (VIN)
        3. Selectable Gains (FGA and PGA)
        4. Buffer (BUFF)
        5. Internal/External CLK Selection
        6. Programmable ODRS
        7. Digital Filter
        8. GPIO (D0-D6)
    4. 9.4 Device Functional Modes
      1. 9.4.1 Channels Scan Mode
        1. ScanMode0: Single-Channel Continuous Conversion
        2. ScanMode1: Multiple-Channels Single Scan
        3. ScanMode2: Multiple-Channels Continuous Scan
        4. ScanMode3: Multiple-Channels Continuous Scan with Burnout Currents
      2. 9.4.2 Sensor Interface
        1. IB1 & IB2 - Excitation Currents (LMP90080/LMP90078)
        2. Burnout Currents
          1. Burnout Current Injection
        3. Sensor Diagnostic Flags
          1. SHORT_THLD_FLAG
          2. RAILS_FLAG
          3. POR_AFT_LST_RD
          4. OFLO_FLAGS
          5. SAMPLED_CH
    5. 9.5 Programming
      1. 9.5.1 Serial Digital Interface
        1. Register Address (ADDR)
        2. Register Read/Write Protocol
        3. Streaming
        4. CSB - Chip Select Bar
        5. SPI Reset
        6. DRDYB - Data Ready Bar
          1. DrdybCase1: Combining SDO/DRDYB with SDO_DRDYB_DRIVER = 0x00
          2. DrdybCase2: Combining SDO/DRDYB with SDO_DRDYB_DRIVER = 0x03
          3. DrdybCase3: Routing DRDYB to D6
        7. Data Only Read Transaction
        8. Cyclic Redundancy Check (CRC)
      2. 9.5.2 RESET and RESTART
      3. 9.5.3 Register Read/Write Examples
        1. Writing to Register Examples
        2. Reading from Register Example
      4. 9.5.4 Streaming Examples
        1. Normal Streaming Example
        2. Controlled Streaming Example
    6. 9.6 Register Maps
      1. 9.6.1 Power and Reset Registers
      2. 9.6.2 ADC Registers
      3. 9.6.3 Channel Configuration Registers  
      4. 9.6.4 Calibration Registers
      5. 9.6.5 Sensor Diagnostic Registers
      6. 9.6.6 SPI Registers
      7. 9.6.7 GPIO Registers
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Connecting the Supplies
        1. VA and VIO
        2. VREF
      2. 10.1.2 Quick Start
      3. 10.1.3 ADC_DOUT Calculation
    2. 10.2 Typical Applications
      1. 10.2.1 Typical Sensor Application
        1. Design Requirements
        2. Detailed Design Procedure
        3. Application Curve
      2. 10.2.2 3-Wire RTD
        1. Design Requirements
        2. Detailed Design Procedure
        3. Application Curve
      3. 10.2.3 Thermocouple and IC Analog Temperature
        1. Design Requirements
        2. Detailed Design Procedure
        3. Application Curve
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Device Nomenclature
    2. 13.2 Related Links
    3. 13.3 Community Resources
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10 Application and Implementation


Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

10.1 Application Information

10.1.1 Connecting the Supplies VA and VIO

Any ADC architecture is sensitive to spikes on the analog voltage, VA, digital input/output voltage, VIO, and ground pins. These spikes may originate from switching power supplies, digital logic, high power devices, and other sources. To diminish these spikes, the LMP900xx’s VA and VIO pins should be clean and well bypassed. A 0.1 µF ceramic bypass capacitor and a 1 µF tantalum capacitor should be used to bypass the LMP900xx supplies, with the 0.1 µF capacitor placed as close to the LMP900xx as possible.

Since the LMP900xx has both external VA and VIO pins, the user has two options on how to connect these pins. The first option is to tie VA and VIO together and power them with the same power supply. This is the most cost effective way of powering the LMP900xx but is also the least ideal because noise from VIO can couple into VA and negatively affect performance. The second option involves powering VA and VIO with separate power supplies. These supply voltages can have the same amplitude or they can be different. VREF

Operation with VREF below VA is also possible with slightly diminished performance. As VREF is reduced, the range of acceptable analog input voltages is also reduced. Reducing the value of VREF also reduces the size of the LSB. When the LSB size goes below the noise floor of the LMP900xx, the noise will span an increasing number of codes and performance will degrade. For optimal performance, VREF should be the same as VA and sourced with a clean source that is bypassed with a ceramic capacitor value of 0.1 µF and a tantalum capacitor of 10 µF.

LMP900xx also allows ratiometric connection for noise immunity reasons. A ratiometric connection is when the ADC’s VREFP and VREFN are used to excite the input device’s (i.e. a bridge sensor) voltage references. This type of connection severely attenuates any VREF ripple seen the ADC output, and is thus strongly recommended.

10.1.2 Quick Start

This section shows step-by-step instructions to configure the LMP900xx to perform a simple DC reading from CH0.

  1. Apply VA = VIO = VREFP1 = 5V, and ground VREFN1
  2. Apply VINP = ¾VREF and VINN = ¼VREF for CH0. Thus, set CH0 = VIN = VINP - VINN = ½VREF (CH0_INPUTCN register)
  3. Set gain = 1 (CH0_CONFIG: GAIN_SEL = 0x0)
  4. Exclude the buffer from the signal path (CH0_CONFIG: BUF_EN = 0)
  5. Set the background to BgcalMode2 (BGCALCN = 0x2)
  6. Select VREF1 (CH0_INPUTCN: VREF_SEL = 0)
  7. To use the internal CLK, set CLK_EXT_DET = 1 and CLK_SEL = 0.
  8. Follow the register read/write protocol (Figure 55) to capture ADC_DOUT from CH0.

10.1.3 ADC_DOUT Calculation

The output code of the LMP900xx can be calculated as:

Equation 13. LMP90077 LMP90078 LMP90079 LMP90080 30169746.gif
Output Code

ADC_DOUT is in 16−bit two's complement binary format. The largest positive value is 0x7FFF (or 32767 in decimal), while the largest negative value is 0x8000 (or 32768 in decimal). In case of an over range the value is automatically clamped to one of these two values.

Figure 71 shows the theoretical output code, ADC_DOUT, vs. analog input voltage, VIN, using the equation above.

LMP90077 LMP90078 LMP90079 LMP90080 30169747.gif Figure 71. ADC_DOUT vs. VIN of a 16-Bit Resolution (VREF = 5.5 V, Gain = 1).

10.2 Typical Applications

10.2.1 Typical Sensor Application

LMP90077 LMP90078 LMP90079 LMP90080 30169774.gif Figure 72. Typical Sensor Application Design Requirements

  • VA = 3 V
  • VIO = 3 V
  • 3-Wire RTD using 2 current sources Detailed Design Procedure

Figure 72 shows the first topology for a 3-wire resistive temperature detector (RTD) application. Topology #1 uses two excitation current sources, IB1 and IB2, to create a differential voltage across VIN0 and VIN1. As a result of using both IB1 and IB2, only one channel (VIN0-VIN1) needs to be measured. As shown in Equation 14, the equation for this channel is IB1 x (RTD – RCOMP) assuming that RLINE1 = RLINE2.

Equation 14. LMP90077 LMP90078 LMP90079 LMP90080 30169795.gif
VIN Equation for Topology #1

The PT-100 changes linearly from 100 Ω at 0°C to 146.07 Ω at 120°C. If desired, choose a suitable compensating resistor (RCOMP) so that VIN can be virtually 0 V at any desirable temperature. For example, if RCOMP = 100 Ω, then at 0°C, VIN = 0 V and thus a higher gain can be used.

The advantage of this circuit is its ratiometric configuration, where VREF = (IB1 + IB2) x (RREF). Equation 15 shows that a ratiometric configuration eliminates IB1 and IB2 from the output equation, thus increasing the overall performance.

Equation 15. LMP90077 LMP90078 LMP90079 LMP90080 30169755.gif
ADC_DOUT Showing IB1 & IB2 Elimination Application Curve

LMP90077 LMP90078 LMP90079 LMP90080 app-cruve-1.gif Figure 73. PT-100 RTD Resistance from –200°C to 850°C

10.2.2 3–Wire RTD

LMP90077 LMP90078 LMP90079 LMP90080 30169752.gif Figure 74. Topology #1: 3-Wire RTD using 2 Current Sources
LMP90077 LMP90078 LMP90079 LMP90080 30169796.gif Figure 75. Topology #2: 3-Wire RTD using 1 Current Source Design Requirements

  • VA = 3V
  • VIO = 3V
  • 3-Wire RTD using 1 current source Detailed Design Procedure

Figure 75 shows the second topology for a 3-Wire RTD application. Topology #2 shows the same connection as topology #1, but without IB2. Although this topology eliminates a current source, it requires two channel measurements as shown in Equation 16.

Equation 16. LMP90077 LMP90078 LMP90079 LMP90080 30169797.gif
VIN Equation for Topology #2 Application Curve

LMP90077 LMP90078 LMP90079 LMP90080 app-cruve-1.gif Figure 76. PT-100 RTD Resistance from –200°C to 850°C

10.2.3 Thermocouple and IC Analog Temperature

LMP90077 LMP90078 LMP90079 LMP90080 30169799.gif Figure 77. Thermocouple with CJC Design Requirements

  • VA = 5V
  • VIO = 2.7V
  • Thermocouple with Cold Junction Compensation Detailed Design Procedure

The LMP900xx is also ideal for thermocouple temperature applications. Thermocouples have several advantages that make them popular in many industrial and medical applications. Compare to RTDs, thermistors, and IC sensors, thermocouples are the most rugged, least expensive, and can operate over the largest temperature range.

A thermocouple is a sensor whose junction generates a differential voltage, VIN, that is relative to the temperature difference (Thot – Tcold). Thot is also known as the measuring junction or “hot” junction, which is placed at the measured environment. Tcold is also known as the reference or “cold” junction, which is placed at the measuring system environment.

Because a thermocouple can only measure a temperature difference, it does not have the ability to measure absolute temperature. To determine the absolute temperature of the measured environment (Thot), a technique known as cold junction compensation (CJC) must be used.

In a CJC technique, the “cold” junction temperature, Tcold, is sensed by using an IC temperature sensor, such as the LM94022. The temperature sensor should be placed within close proximity of the reference junction and should have an isothermal connection to the board to minimize any potential temperature gradients.

Once Tcold is obtained, use a standard thermocouple look-up-table to find its equivalent voltage. Next, measure the differential thermocouple voltage and add the equivalent cold junction voltage. Lastly, convert the resulting voltage to temperature using a standard thermocouple look-up-table.

For example, assume Tcold = 20°C. The equivalent voltage from a type K thermocouple look-up-table is 0.798 mV. Next, add the measured differential thermocouple voltage to the Tcold equivalent voltage. For example, if the thermocouple voltage is 4.096 mV, the total would be 0.798 mV + 4.096 mV = 4.894 mV. Referring to the type K thermocouple table gives a temperature of 119.37°C for 4.894 mV. Application Curve

LMP90077 LMP90078 LMP90079 LMP90080 app-curve-2.gif Figure 78. Thermocouple Output as Function of Temperature