SNVSAN3F August   2017  – November 2020 LMR33630


  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Characteristics
    7. 7.7 System Characteristics
    8. 7.8 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Power-Good Flag Output
      2. 8.3.2 Enable and Start-up
      3. 8.3.3 Current Limit and Short Circuit
      4. 8.3.4 Undervoltage Lockout and Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Auto Mode
      2. 8.4.2 Dropout
      3. 8.4.3 Minimum Switch On-Time
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1.  Custom Design With WEBENCH® Tools
        2.  Choosing the Switching Frequency
        3.  Setting the Output Voltage
        4.  Inductor Selection
        5.  Output Capacitor Selection
        6.  Input Capacitor Selection
        7.  CBOOT
        8.  VCC
        9.  CFF Selection
        10. External UVLO
        11. Maximum Ambient Temperature
      3. 9.2.3 Application Curves
    3. 9.3 What to Do and What Not to Do
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Ground and Thermal Considerations
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. Custom Design With WEBENCH® Tools
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RNX|12
  • DDA|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Electrical Characteristics

Limits apply over the operating junction temperature (TJ) range of –40°C to +125°C, unless otherwise stated. Minimum and maximum limits are specified through test, design or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Unless otherwise stated, the following conditions apply: VIN  = 12 V, VEN = 4 V.     
VINMinimum operating input voltage3.8V
IQNon-switching input current; measured at VIN pin (2)VFB = 1.2 V2434µA
ISDShutdown quiescent current; measured at VIN pinEN = 0510µA
VEN-VCC-HEN input level required to turn on internal LDORising threshold1V
VEN-VCC-LEN input level required to turn off internal LDOFalling threshold0.3V
VEN-HEN input level required to start switchingRising threshold1.21.2311.26V
VEN-HYSHysteresis below VEN-HHysteresis below VEN-H; falling100mV
ILKG-ENEnable input leakage currentVEN = 3.3 V0.2nA
VCCInternal LDO output voltage appearing at the VCC pin6 V ≤ VIN ≤ 36 V4.7555.25V
VBOOT-UVLOBootstrap voltage undervoltage lock-out threshold(3)2.2V
VFBFeedback voltage; ADJ option0.98511.015V
IFBCurrent into FB pin; ADJ optionFB = 1 V0.250nA
ISCHigh-side current limitLMR336303.854.55.05A
ILIMITLow-side current limitLMR336302.93.54.1A
IPEAK-MINMinimum peak inductor currentLMR336300.69A
IZCZero current detector threshold-0.106A
tSSInternal soft-start time2.946ms
VPG-HIGH-UPPower-good upper threshold - rising% of FB voltage105%107%110%
VPG-HIGH-DNPower-good upper threshold - falling% of FB voltage103%105%108%
VPG-LOW-UPPower-good lower threshold - rising% of FB voltage92%94%97%
VPG-LOW-DNPower-good lower threshold - falling% of FB voltage90%92%95%
tPGPower-good glitch filter delay(1)60170µs
RPGPower-good flag RDSONVIN = 12 V, VEN = 4 V76150
VEN = 0 V3560
VIN-PGMinimum input voltage for proper PG function50-µA, EN = 0 V2V
VPGPG logic low output50-µA, EN = 0 V, VIN = 2V0.2V
ƒSWSwitching frequency"A" Version340400460kHz
ƒSWSwitching frequency"B" Version1.21.41.6MHz
ƒSWSwitching frequency"C" Version, DDA package1.82.12.4MHz
ƒSWSwitching frequency"C" Version, RNX package1.82.12.3MHz
RDS-ON-HSHigh-side MOSFET ON-resistanceRNX package75145
RDS-ON-HSHigh-side MOSFET ON-resistanceDDA package95160
RDS-ON-LSLow-side MOSFET ON-resistanceRNX package5095
RDS-ON-LSLow-side MOSFET ON-resistanceDDA package66110
See Power-Good Flag Output for details.
This is the current used by the device open loop. It does not represent the total input current of the system when in regulation.
When the voltage across the CBOOT capacitor falls below this voltage, the low side MOSFET is turned on to recharge CBOOT.
The current limit values in this table are tested, open loop, in production. They may differ from those found in a closed loop application.