SNVSC41 November   2023 LMR36500

PRODMIX  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD (Commercial) Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 System Characteristics
    7. 6.7 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Enable, Shutdown, and Start-up
      2. 7.3.2 Adjustable Switching Frequency (with RT)
      3. 7.3.3 Power-Good Output Operation
      4. 7.3.4 Internal LDO, VCC UVLO, and VOUT/FB Input
      5. 7.3.5 Bootstrap Voltage and VBOOT-UVLO (BOOT Terminal)
      6. 7.3.6 Output Voltage Selection
      7. 7.3.7 Soft Start and Recovery from Dropout
        1. 7.3.7.1 Soft Start
        2. 7.3.7.2 Recovery from Dropout
      8. 7.3.8 Current Limit and Short Circuit
      9. 7.3.9 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode
      2. 7.4.2 Standby Mode
      3. 7.4.3 Active Mode
        1. 7.4.3.1 CCM Mode
        2. 7.4.3.2 AUTO Mode - Light Load Operation
          1. 7.4.3.2.1 Diode Emulation
          2. 7.4.3.2.2 Frequency Reduction
        3. 7.4.3.3 FPWM Mode - Light Load Operation
        4. 7.4.3.4 Minimum On-time Operation
        5. 7.4.3.5 Dropout
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Choosing the Switching Frequency
        2. 8.2.2.2  Setting the Output Voltage
          1. 8.2.2.2.1 VOUT / FB for Adjustable Output
        3. 8.2.2.3  Inductor Selection
        4. 8.2.2.4  Output Capacitor Selection
        5. 8.2.2.5  Input Capacitor Selection
        6. 8.2.2.6  CBOOT
        7. 8.2.2.7  VCC
        8. 8.2.2.8  CFF Selection
        9. 8.2.2.9  External UVLO
        10. 8.2.2.10 Maximum Ambient Temperature
      3. 8.2.3 Application Curves
    3. 8.3 Best Design Practices
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
        1. 8.5.1.1 Ground and Thermal Considerations
      2. 8.5.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Device Nomenclature
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Maximum Ambient Temperature

As with any power conversion device, the LMR36500 dissipates internal power while operating. The effect of this power dissipation is to raise the internal temperature of the converter above ambient. The internal die temperature (TJ) is a function of the ambient temperature, the power loss, and the effective thermal resistance, RθJA, of the device and PCB combination. The maximum junction temperature for the LMR36500 must be limited to 150°C. This limit establishes a limit on the maximum device power dissipation and, therefore, the load current. Equation 15 shows the relationships between the important parameters. It is easy to see that larger ambient temperatures (TA) and larger values of RθJA reduce the maximum available output current. The converter efficiency can be estimated by using the curves provided in this data sheet. If the desired operating conditions cannot be found in one of the curves, interpolation can be used to estimate the efficiency. Alternatively, the EVM can be adjusted to match the desired application requirements and the efficiency can be measured directly. The correct value of RθJA is more difficult to estimate. As stated in Semiconductor and IC Package Thermal Metrics application report, the value of RΘJA given in the Thermal Information Table, is not valid for design purposes and must not be used for estimating the thermal performance of the application. The values reported in that table were measured under a specific set of conditions that are rarely obtained in an actual application. For more information, refer to the Semiconductor and IC Package Thermal Metrics application report.

Equation 15. I O U T | M A X = ( T J - T A ) R θ J A × η 1 - η × 1 V O U T

where

  • η is the efficiency.

The effective RθJA is a critical parameter and depends on many factors such as the following:

  • Power dissipation
  • Air temperature and flow
  • PCB area
  • Copper heat-sink area
  • Number of thermal vias under the package
  • Adjacent component placement

A typical example of RθJA versus copper board area can be found in Figure 8-23 . The copper area given in the graph is for each layer. For a 4-layer PCB design, the top and bottom layers are 2-oz. copper each, while the inner layers are 1 oz. For a 2-layer PCB design, the top and bottom layers are 2-oz. copper each. Note that the data given in these graphs are for illustration purposes only, and the actual performance in any given application depends on all of the factors mentioned above.

GUID-20230918-SS0I-41FQ-ZN52-TJHLM1FNCRQJ-low.svg Figure 8-4 Typical RΘJA vs Copper Area

The IC junction temperature can be estimated for a given operating condition using Equation 16.

Equation 16. TJ ≈ TA + RθJA × IC Power Loss

where

  • TJ is the IC junction temperature (°C).
  • TA is the ambient temperature (°C).
  • RθJA is the thermal resistance (°C/W)
  • IC Power Loss is the power loss for the IC (W).

The IC Power loss mentioned above is the overall power loss minus the loss that comes from the inductor DC Resistance. The overall power loss can be approximated by using WEBENCH for a specific operating condition and temperature.

Use the following resources as guides to optimal thermal PCB design and estimating RθJA for a given application environment: