7.3.1 Output Overvoltage Protection

If the voltage at FB is greater than a 0.86-V internal reference, the output of the error amplifier is pulled toward ground, causing V_OUT to fall.

7.3.2 Current Limit

The LMZ12008 is protected by both low-side (LS) and high-side (HS) current limit circuitry. The LS current limit detection is carried out during the OFF-time by monitoring the current through the LS synchronous MOSFET. Referring to the Functional Block Diagram, when the top MOSFET is turned off, the inductor current flows through the load, the PGND pin and the internal synchronous MOSFET. If this current exceeds 13 A (typical) the current limit comparator disables the start of the next switching period. Switching cycles are prohibited until current drops below the limit.

The HS current limit monitors the current of top side MOSFET. Once HS current limit is detected (16 A typical) , the HS MOSFET is shutoff immediately, until the next cycle. Exceeding HS current limit causes V_OUT to fall. Typical behavior of exceeding LS current limit is that f_SW drops to 1/2 of the operating frequency.

7.3.3 Thermal Protection

The junction temperature of the LMZ12008 must not be allowed to exceed its maximum ratings. Thermal protection is implemented by an internal Thermal Shutdown circuit which activates at 165°C (typical) causing the device to enter a low power standby state. In this state the main MOSFET remains off causing V_OUT to fall, and additionally the C_SS capacitor is discharged to ground. Thermal protection helps prevent catastrophic failures for accidental device overheating. When the junction temperature falls back below 150°C (typical hysteresis = 15°C) the SS pin is released, V_OUT rises smoothly, and normal operation resumes.

Applications requiring maximum output current especially those at high input voltage may require additional derating at elevated temperatures.

7.3.4 Prebiased Start-Up

The LMZ12008 will properly start up into a prebiased output. This start-up situation is common in multiple rail logic applications where current paths may exist between different power rails during the start-up sequence. Figure 45 shows proper behavior in this mode. Trace one is Enable going high. Trace two is 1.8-V prebias rising to 3.3 V. Trace three is the SS voltage with a C_SS= 0.47 µF. Rise-time determined by C_SS.

Figure 45. Prebiased Start-Up

7.4.1 Discontinuous Conduction and Continuous Conduction Modes

At light load the regulator will operate in discontinuous conduction mode (DCM). With load currents above the critical conduction point, it will operate in continuous conduction mode (CCM). When operating in DCM, inductor current is maintained to an average value equaling I_OUT. In DCM the low-side switch will turn off when the inductor current falls to zero, this causes the inductor current to resonate. Although it is in DCM, the current is allowed to go slightly negative to charge the bootstrap capacitor.

In CCM, current flows through the inductor through the entire switching cycle and never falls to zero during the OFF-time.

Figure 46 is a comparison pair of waveforms showing both the CCM (upper) and DCM operating modes.

V_IN = 12 V, V_O = 3.3 V, I_O = 3 A / 0.3 A

Figure 46. CCM and DCM Operating Modes

The approximate formula for determining the DCM/CCM boundary is as follows:

Equation 1.

The inductor internal to the module is 2.2 μH. This value was chosen as a good balance between low and high input voltage applications. The main parameter affected by the inductor is the amplitude of the inductor ripple current (Δi_L). Δi_L can be calculated with:

Equation 2.

where

• V_IN is the maximum input voltage
• and f_SW is typically 359 kHz.

If the output current I_OUT is determined by assuming that I_OUT = I_L, the higher and lower peak of Δi_L can be determined.