SNOSCT6F March   2013  – January 2017 LP38798

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Noise Filter
      2. 7.3.2 Enable Input Operation
      3. 7.3.3 Undervoltage Lockout (UVLO)
      4. 7.3.4 Output Current Limiting
      5. 7.3.5 Thermal Shutdown
    4. 7.4 Device Functional Modes
    5. 7.5 Programming
      1. 7.5.1 Programming the Output Voltage
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application: VOUT = 5 V
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Input Capacitor Recommendations
        3. 8.2.2.3 Output Capacitor Recommendations
        4. 8.2.2.4 Charge Pump
        5. 8.2.2.5 Setting the Output Voltage
        6. 8.2.2.6 Device Dissipation
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
    4. 10.4 Estimating the Junction Temperature
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Suppport
        1. 11.1.1.1 Custom Design With WEBENCH® Tools
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

DNT Package
12-Pin WSON
Top View
LP38798 30204208.gif
Connect WSON DAP to GND at Pins 6 and 7.

Pin Functions

PIN I/O DESCRIPTION
NUMBER NAME
1, 2 IN I Device unregulated input voltage pins. Connect pins together at the package.
3 IN(CP) I Charge pump input voltage pin. Connect directly to pins 1 and 2 at the package.
4 CP O Charge pump output. See Charge Pump section in Application and Implementation for more information.
5 EN I Enable pin. This pin has an internal pullup to turn the LDO output on by default. A logic low level turns the LDO output Off, and reduce the operating current of the device. See Enable Input Operation section in Application and Implementation for more information.
6 GND(CP) — Device charge pump ground pin.
7 GND — Device analog ground pin.
8 FB i Feedback pin for programming the output voltage.
9 SET I/O Reference voltage output, and noise filter input. A feedback resistor divider network from this pin to FB and GND will set the output voltage of the device.
10 OUT(FB) I OUT buffer feedback input pin. Connect directly to pins 11 and 12 at the package.
11, 12 OUT O Device regulated output voltage pins. Connect pins together at the package.
Exposed Pad DAP — The exposed die attach pad on the bottom of the package must be connected to a copper thermal pad on the PCB at ground potential. Connect to ground potential or leave floating. Do not connect to any potential other than the same ground potential seen at device pins 6 (GND(CP)) and 7 (GND). See Thermal Considerations section in Layout for more information.