SLVSEM4B June   2018  – April 2021 LSF0204-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Switching Characteristics: AC Performance (Translating Down, 3.3 V to 1.8 V)
    7. 6.7  Switching Characteristics: AC Performance (Translating Down, 3.3 V to 1.2 V)
    8. 6.8  Switching Characteristics: AC Performance (Translating Up, 1.8 V to 3.3 V)
    9. 6.9  Switching Characteristics: AC Performance (Translating Up, 1.2 V to 1.8 V)
    10. 6.10 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Auto-Bidirectional Voltage Translation Without DIR Pin Terminal
      2. 7.3.2 Support Multiple High Speed Translation Interfaces
      3. 7.3.3 5-V Tolerance on IO Port and 125°C Support
      4. 7.3.4 Channel Specific Translation
      5. 7.3.5 Ioff, Partial Power Down Mode
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 I2C, PMBus, SMBus, GPIO Application
        1. 8.2.1.1 Design Requirements
          1. 8.2.1.1.1 Enable, Disable, and Reference Voltage Guidelines
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Bidirectional Translation
            1. 8.2.1.2.1.1 Pull-Up Resistor Sizing
        3. 8.2.1.3 Application Curve
      2. 8.2.2 MDIO Application
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
      3. 8.2.3 Multiple Voltage Translation in Single Device, Application
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Detailed Design Procedure
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • AEC-Q100 qualified for automotive applications
    • Temperature grade 1: –40°C ≤ TA ≤ 125°C
    • Device HBM ESD classification level 2
    • CDM ESD classification level C6
  • Provides auto-bidirectional voltage translation without direction pin
  • Supports open drain or push-pull applications such as I2C, I2S, SPI, UART, JTAG, MDIO, SDIO, and GPIO
  • Supports up to 100-MHz up translation and greater than 100-MHz down translation
    at ≤ 30-pF capacitor load and up to 40-MHz up/down translation at 50-pF capacitor load
  • Supports Ioff, partial power down mode (see Section 7.3)
  • Allows bidirectional voltage level translation between
    • 0.95 V ↔ 1.8, 2.5, 3.3, 5.5 V
    • 1.2 V ↔ 1.8, 2.5, 3.3, 5.5 V
    • 1.8 V ↔ 2.5, 3.3, 5.5 V
    • 2.5 V ↔ 3.3, 5.5 V
    • 3.3 V ↔ 5.5 V
  • 5-V tolerance on I/O ports
  • Low Ron enables better signal integrity
  • Flow-through pinout for easy PCB trace routing
  • Latch-up performance exceeds 100 mA per JESD17