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Product details

Parameters

Technology Family LSF Application I2C, MDIO, SMBus Bits (#) 2 High input voltage (Min) (Vih) 0.9 High input voltage (Max) (Vih) 5.5 Output voltage (Max) (V) 5.5 Output voltage (Min) (V) 0.9 IOH (Max) (mA) 0 IOL (Max) (mA) 0 Rating Automotive open-in-new Find other Auto bidirectional voltage translators

Package | Pins | Size

TSSOP (PW) 14 32 mm² 5 x 6.4 open-in-new Find other Auto bidirectional voltage translators

Features

  • AEC-Q100 Qualified for Automotive Applications
    • Temperature Grade 1: –40°C ≤ TA ≤ 125°C
    • Device HBM ESD Classification Level 2
    • CDM ESD Classification Level C6
  • Provides Auto-Bidirectional Voltage Translation Without Direction Pin
  • Supports Open drain or Push-pull Applications such as I2C, I2S, SPI, UART, JTAG, MDIO, SDIO, and GPIO
  • Supports up to 100-MHz Up Translation and Greater Than 100-MHz Down Translation
    at ≤ 30-pF Capacitor Load and up to 40-MHz Up/Down Translation at 50-pF Capacitor Load
  • Supports Ioff, Partial Power Down Mode (See Feature Description)
  • Allows Bidirectional Voltage Level Translation Between
    • 0.95 V ↔ 1.8, 2.5, 3.3, 5.5 V
    • 1.2 V ↔ 1.8, 2.5, 3.3, 5.5 V
    • 1.8 V ↔ 2.5, 3.3, 5.5 V
    • 2.5 V ↔ 3.3, 5.5 V
    • 3.3 V ↔ 5.5 V
  • 5-V Tolerance on I/O Ports
  • Low Ron Enables Better Signal Integrity
  • Flow-Through Pinout for Easy PCB Trace Routing
  • Latch-Up Performance Exceeds 100 mA Per JESD17

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Description

The LSF0204-Q1 is automotive qualified four channel auto bidirectional voltage translator that operate from 0.8 V to 4.5 V (Vref_A) and 1.8 V to 5.5 V (Vref_B). This range allows for bidirectional voltage translations between 0.8 V and 5.5 V without the need for a direction pin.

When the An or Bn port is LOW, the switch is in the ON-state and a low resistance connection exists between the An and Bn ports. The low Ron of the switch allows connections to be made with minimal propagation delay and minimal signal distortion. The voltage on the A or B side will be limited to Vref_A and can be pulled up to any level between Vref_A and 5.5 V

The supply voltage (VPUn) for each channel may be individually set up with a pull up resistor. For example, CH1 may be used in up-translation mode (1.2 V ↔ 3.3 V) and CH2 in down-translation mode (2.5 V ↔ 1.8 V).

When EN is HIGH, the translator switch is on, and the An I/O is connected to the Bn I/O, respectively, allowing bidirectional data flow between ports. When EN is LOW, the translator switch is off, and a high-impedance state exists between ports. The EN input circuit is designed to be supplied by Vref_A. EN must be LOW to ensure the high-impedance state during power-up or power-down.

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Technical documentation

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Type Title Date
* Datasheet LSF0204-Q1 Automotive Qualified 4-Bit Auto-Bidirectional Multi-Voltage Level Translator datasheet (Rev. A) Sep. 20, 2018
Selection guides Voltage translation buying guide Jun. 13, 2019

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
10
Description
This EVM is designed to support any logic device that has a D, DW, DB, NS, PW, P, N, or DGV package in a 14 to 24 pin count.
Features
  • Board design allows for versatility in evaluation
  • Supports a wide-range of logic devices
EVALUATION BOARDS Download
document-generic User guide
20
Description

The LSF family of devices are level translators that support a voltage range of 0.95V and 5V and provide multi-voltage bidirectional translation without a direction pin.

The LSF-EVM comes populated with the LSF0108PWR device and has landing patterns that are compatible with the LSF0101DRYR (...)

Features
  • Supports all devices in the LSF family of level translators (LSF0101, LSF0102, LSF0204, LSF0108)
  • Layout optimized for high speed operation (up to 100 MHz up translation and greater than 100 MHz down translation)
  • Includes various connection interfaces including edge-mount SMB and differential probe (...)

Design tools & simulation

SIMULATION MODELS Download
SLVMAL3.ZIP (7 KB) - HSpice Model

CAD/CAE symbols

Package Pins Download
TSSOP (PW) 14 View options

Ordering & quality

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