SLLSFT3 November   2025 MC121-Q1

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings Auto
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 I2C Timing Requirements
    7. 5.7 Timing Diagrams
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Motor Control
        1. 6.3.1.1 Duty Input
        2. 6.3.1.2 Duty Curve
        3. 6.3.1.3 Motor Start, Speed Change, and Stop
        4. 6.3.1.4 Open-Loop (Duty Cycle) Control
        5. 6.3.1.5 Closed-Loop (Speed) Control
        6. 6.3.1.6 Commutation
          1. 6.3.1.6.1 Hall Sensor
            1. 6.3.1.6.1.1 Field Direction Definition
            2. 6.3.1.6.1.2 Internal Hall Latch Sensor Output
          2. 6.3.1.6.2 Hall Offset
          3. 6.3.1.6.3 Square Commutation
          4. 6.3.1.6.4 Soft Commutation
        7. 6.3.1.7 PWM Modulation Modes
      2. 6.3.2 Protections
        1. 6.3.2.1 Locked Rotor Protection
        2. 6.3.2.2 Current Limit
        3. 6.3.2.3 Overcurrent Protection (OCP)
        4. 6.3.2.4 VM Undervoltage Lockout (UVLO)
        5. 6.3.2.5 VM Over Voltage Protection (OVP)
        6. 6.3.2.6 Thermal Shutdown (TSD)
        7. 6.3.2.7 Integrated Supply (VM) Clamp
    4. 6.4 Device Functional Modes
      1. 6.4.1 Active Mode
      2. 6.4.2 Sleep and Standby Mode
      3. 6.4.3 Fault Mode
      4. 6.4.4 Test Mode and One-Time Programmable Memory
    5. 6.5 Programming
      1. 6.5.1 I2C Communication
        1. 6.5.1.1 I2C Read
        2. 6.5.1.2 I2C Write
  8. 7 Register Map
    1. 7.1 USR_OTP Registers
    2. 7.2 USR_TM Registers
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 External Components
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Bulk Capacitance
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History

Package Options

Mechanical Data (Package|Pins)
  • DYM|6
  • DEZ|6
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.3.2.2 Current Limit

Current limit feature protects the motor from overcurrent operation during start-up, overload and stall conditions. When the motor phase current exceeds the ILIMIT threshold, the MC121-Q1 uses a cycle-by-cycle current limit scheme by turning off the high-side FET. ILIMIT_SEL sets the current limit threshold. The PWM_MODE bits set synchronous, asynchronous, or hybrid recirculation states for motor current during the current limiting OFF time, similar to the PWM OFF time described in Section 6.3.1.7.

If the motor current remains above the ILIMIT threshold at the start of the next PWM period, then the low-side FETs remain enabled for another PWM period. If the motor current drops below ILIMIT by the start of the next PWM period, the outputs return to the driving state determined by the commutation algorithm state machine as shown in Table 6-1.

Current limiting provides an upper limit to the motor torque by reducing the output PWM duty cycle when motor current is above the ILIMIT threshold. The current limit function takes priority over the PWM duty cycle determined by the commutation state machine. When the motor current drops below the ILIMIT threshold, the commutation state machine has full control of the output duty cycle. Figure 6-25and Figure 6-26 show example waveforms of the cycle-by-cycle current limiting scheme.

MC121-Q1 Cycle-by-Cycle Current-Limit Operation Figure 6-25 Cycle-by-Cycle Current-Limit Operation
MC121-Q1 Cycle-by-Cycle Current-Limit Operation with 100% PWM Duty Cycle Figure 6-26 Cycle-by-Cycle Current-Limit Operation with 100% PWM Duty Cycle