SLLSFU1 December   2023 MCF8315C

PRODMIX  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Characteristics of the SDA and SCL bus for Standard and Fast mode
    7. 5.7 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  Output Stage
      2. 6.3.2  Device Interface
        1. 6.3.2.1 Interface - Control and Monitoring
        2. 6.3.2.2 I2C Interface
      3. 6.3.3  Step-Down Mixed-Mode Buck Regulator
        1. 6.3.3.1 Buck in Inductor Mode
        2. 6.3.3.2 Buck in Resistor mode
        3. 6.3.3.3 Buck Regulator with External LDO
        4. 6.3.3.4 AVDD Power Sequencing from Buck Regulator
        5. 6.3.3.5 Mixed Mode Buck Operation and Control
        6. 6.3.3.6 Buck Under Voltage Protection
        7. 6.3.3.7 Buck Over Current Protection
      4. 6.3.4  AVDD Linear Voltage Regulator
      5. 6.3.5  Charge Pump
      6. 6.3.6  Slew Rate Control
      7. 6.3.7  Cross Conduction (Dead Time)
      8. 6.3.8  Motor Control Input Sources
        1. 6.3.8.1 Analog Mode Motor Control
        2. 6.3.8.2 PWM Mode Motor Control
        3. 6.3.8.3 I2C based Motor Control
        4. 6.3.8.4 Frequency Mode Motor Control
        5. 6.3.8.5 Speed Profiles
          1. 6.3.8.5.1 Linear Reference Profiles
          2. 6.3.8.5.2 Staircase Reference Profiles
          3. 6.3.8.5.3 Forward-Reverse Reference Profiles
      9. 6.3.9  Starting the Motor Under Different Initial Conditions
        1. 6.3.9.1 Case 1 – Motor is Stationary
        2. 6.3.9.2 Case 2 – Motor is Spinning in the Forward Direction
        3. 6.3.9.3 Case 3 – Motor is Spinning in the Reverse Direction
      10. 6.3.10 Motor Start Sequence (MSS)
        1. 6.3.10.1 Initial Speed Detect (ISD)
        2. 6.3.10.2 Motor Resynchronization
        3. 6.3.10.3 Reverse Drive
          1. 6.3.10.3.1 Reverse Drive Tuning
      11. 6.3.11 Motor Start-up
        1. 6.3.11.1 Align
        2. 6.3.11.2 Double Align
        3. 6.3.11.3 Initial Position Detection (IPD)
          1. 6.3.11.3.1 IPD Operation
          2. 6.3.11.3.2 IPD Release Mode
          3. 6.3.11.3.3 IPD Advance Angle
        4. 6.3.11.4 Slow First Cycle Start-up
        5. 6.3.11.5 Open loop
        6. 6.3.11.6 Transition from Open to Closed Loop
      12. 6.3.12 Closed Loop Operation
        1. 6.3.12.1 Closed Loop Acceleration/Deceleration Slew Rate
        2. 6.3.12.2 Speed PI Control
        3. 6.3.12.3 Current PI Control
        4. 6.3.12.4 Torque Mode
        5. 6.3.12.5 Overmodulation
      13. 6.3.13 Motor Parameters
        1. 6.3.13.1 Motor Resistance
        2. 6.3.13.2 Motor Inductance
        3. 6.3.13.3 Motor Back-EMF constant
      14. 6.3.14 Motor Parameter Extraction Tool (MPET)
      15. 6.3.15 Anti-Voltage Surge (AVS)
      16. 6.3.16 Active Braking
      17. 6.3.17 Output PWM Switching Frequency
      18. 6.3.18 PWM Modulation Schemes
      19. 6.3.19 Dead Time Compensation
      20. 6.3.20 Motor Stop Options
        1. 6.3.20.1 Coast (Hi-Z) Mode
        2. 6.3.20.2 Low-Side Braking
        3. 6.3.20.3 Active Spin-Down
      21. 6.3.21 FG Configuration
        1. 6.3.21.1 FG Output Frequency
        2. 6.3.21.2 FG during open loop
        3. 6.3.21.3 FG during idle and fault
      22. 6.3.22 DC Bus Current Limit
      23. 6.3.23 Protections
        1. 6.3.23.1  VM Supply Undervoltage Lockout
        2. 6.3.23.2  AVDD Undervoltage Lockout (AVDD_UV)
        3. 6.3.23.3  BUCK Under Voltage Lockout (BUCK_UV)
        4. 6.3.23.4  VCP Charge Pump Undervoltage Lockout (CPUV)
        5. 6.3.23.5  Overvoltage Protection (OVP)
        6. 6.3.23.6  Overcurrent Protection (OCP)
          1. 6.3.23.6.1 OCP Latched Shutdown (OCP_MODE = 00b)
          2. 6.3.23.6.2 OCP Automatic Retry (OCP_MODE = 01b)
        7. 6.3.23.7  Buck Overcurrent Protection
        8. 6.3.23.8  Hardware Lock Detection Current Limit (HW_LOCK_ILIMIT)
          1. 6.3.23.8.1 HW_LOCK_ILIMIT Latched Shutdown (HW_LOCK_ILIMIT_MODE = 00xxb)
          2. 6.3.23.8.2 HW_LOCK_ILIMIT Automatic recovery (HW_LOCK_ILIMIT_MODE = 01xxb)
          3. 6.3.23.8.3 HW_LOCK_ILIMIT Report Only (HW_LOCK_ILIMIT_MODE = 1000b)
          4. 6.3.23.8.4 HW_LOCK_ILIMIT Disabled (HW_LOCK_ILIMIT_MODE= 1xx1b)
        9. 6.3.23.9  Motor Lock (MTR_LCK)
          1. 6.3.23.9.1 MTR_LCK Latched Shutdown (MTR_LCK_MODE = 00xxb)
          2. 6.3.23.9.2 MTR_LCK Automatic Recovery (MTR_LCK_MODE= 01xxb)
          3. 6.3.23.9.3 MTR_LCK Report Only (MTR_LCK_MODE = 1000b)
          4. 6.3.23.9.4 MTR_LCK Disabled (MTR_LCK_MODE = 1xx1b)
        10. 6.3.23.10 Motor Lock Detection
          1. 6.3.23.10.1 Lock 1: Abnormal Speed (ABN_SPEED)
          2. 6.3.23.10.2 Lock 2: Abnormal BEMF (ABN_BEMF)
          3. 6.3.23.10.3 Lock3: No-Motor Fault (NO_MTR)
        11. 6.3.23.11 Minimum VM (undervoltage) Protection
        12. 6.3.23.12 Maximum VM (overvoltage) Protection
        13. 6.3.23.13 MPET Faults
        14. 6.3.23.14 IPD Faults
        15. 6.3.23.15 Thermal Warning (OTW)
        16. 6.3.23.16 Thermal Shutdown (TSD)
    4. 6.4 Device Functional Modes
      1. 6.4.1 Functional Modes
        1. 6.4.1.1 Sleep Mode
        2. 6.4.1.2 Standby Mode
        3. 6.4.1.3 Fault Reset (CLR_FLT)
    5. 6.5 External Interface
      1. 6.5.1 DRVOFF Functionality
      2. 6.5.2 DAC output (only in RRY package)
      3. 6.5.3 Oscillator Source
        1. 6.5.3.1 External Clock Source
      4. 6.5.4 External Watchdog
    6. 6.6 EEPROM access and I2C interface
      1. 6.6.1 EEPROM Access
        1. 6.6.1.1 EEPROM Write
        2. 6.6.1.2 EEPROM Read
        3. 6.6.1.3 EEPROM Security
      2. 6.6.2 I2C Serial Interface
        1. 6.6.2.1 I2C Data Word
        2. 6.6.2.2 I2C Write Transaction
        3. 6.6.2.3 I2C Read Transaction
        4. 6.6.2.4 I2C Communication Protocol Packet Examples
        5. 6.6.2.5 I2C Clock Stretching
        6. 6.6.2.6 CRC Byte Calculation
    7. 6.7 EEPROM (Non-Volatile) Register Map
      1. 6.7.1 Algorithm_Configuration Registers
      2. 6.7.2 Fault_Configuration Registers
      3. 6.7.3 Hardware_Configuration Registers
      4. 6.7.4 Internal_Algorithm_Configuration Registers
    8. 6.8 RAM (Volatile) Register Map
      1. 6.8.1 Fault_Status Registers
      2. 6.8.2 System_Status Registers
      3. 6.8.3 Device_Control Registers
      4. 6.8.4 Algorithm_Control Registers
      5. 6.8.5 Algorithm_Variables Registers
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 Application Curves
        1. 7.2.1.1 Motor startup
        2. 7.2.1.2 MPET
        3. 7.2.1.3 Dead time compensation
        4. 7.2.1.4 Auto handoff
        5. 7.2.1.5 Anti voltage surge (AVS)
        6. 7.2.1.6 Real time variable tracking using DACOUT
  9. Power Supply Recommendations
    1. 8.1 Bulk Capacitance
  10. Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Thermal Considerations
      1. 9.2.1 Power Dissipation
  11. 10Device and Documentation Support
    1. 10.1 Support Resources
    2. 10.2 Trademarks
    3. 10.3 Electrostatic Discharge Caution
    4. 10.4 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Fault_Status Registers

Table 6-46 lists the memory-mapped registers for the Fault_Status registers. All register offset addresses not listed in Table 6-46 should be considered as reserved locations and the register contents should not be modified.

Table 6-46 FAULT_STATUS Registers
OffsetAcronymRegister NameSection
E0hGATE_DRIVER_FAULT_STATUSFault Status RegisterSection 6.8.1.1
E2hCONTROLLER_FAULT_STATUSFault Status RegisterSection 6.8.1.2

Complex bit access types are encoded to fit into small table cells. Table 6-47 shows the codes that are used for access types in this section.

Table 6-47 Fault_Status Access Type Codes
Access TypeCodeDescription
Read Type
RRRead
Reset or Default Value
-nValue after reset or the default value

6.8.1.1 GATE_DRIVER_FAULT_STATUS Register (Offset = E0h) [Reset = 00000000h]

GATE_DRIVER_FAULT_STATUS is shown in Figure 6-81 and described in Table 6-48.

Return to the Summary Table.

Status of various gate driver faults

Figure 6-81 GATE_DRIVER_FAULT_STATUS Register
3130292827262524
DRIVER_FAULTBK_FLTRESERVEDOCPRESERVEDOVPOTRESERVED
R-0hR-0hR-0hR-0hR-0hR-0hR-0hR-0h
2322212019181716
OTWOTSOCP_HCOCP_LCOCP_HBOCP_LBOCP_HAOCP_LA
R-0hR-0hR-0hR-0hR-0hR-0hR-0hR-0h
15141312111098
RESERVEDOTP_ERRBUCK_OCPBUCK_UVVCP_UVRESERVED
R-0hR-0hR-0hR-0hR-0hR-0h
76543210
RESERVED
R-0h
Table 6-48 GATE_DRIVER_FAULT_STATUS Register Field Descriptions
BitFieldTypeResetDescription
31DRIVER_FAULTR0h Logic OR of gate driver fault status registers
30BK_FLTR0h Buck fault status
0h = No buck regulator fault condition is detected
1h = Buck regulator fault condition is detected
29RESERVEDR0h Reserved
28OCPR0h Overcurrent protection status
0h = No overcurrent condition is detected
1h = Overcurrent condition is detected
27RESERVEDR0h Reserved
26OVPR0h Supply overvoltage protection status
0h = No overvoltage condition is detected on VM
1h = Overvoltage condition is detected on VM
25OTR0h Overtemperature fault status
0h = No overtemperature warning / shutdown is detected
1h = Overtemperature warning / shutdown is detected
24RESERVEDR0h Reserved
23OTWR0h Overtemperature warning status
0h = No overtemperature warning is detected
1h = Overtemperature warning is detected
22OTSR0h Overtemperature shutdown status
0h = No overtemperature shutdown is detected
1h = Overtemperature shutdown is detected
21OCP_HCR0h Overcurrent status on high-side switch of OUTC
0h = No overcurrent detected on high-side switch of OUTC
1h = Overcurrent detected on high-side switch of OUTC
20OCP_LCR0h Overcurrent status on low-side switch of OUTC
0h = No overcurrent detected on low-side switch of OUTC
1h = Overcurrent detected on low-side switch of OUTC
19OCP_HBR0h Overcurrent status on high-side switch of OUTB
0h = No overcurrent detected on high-side switch of OUTB
1h = Overcurrent detected on high-side switch of OUTB
18OCP_LBR0h Overcurrent status on low-side switch of OUTB
0h = No overcurrent detected on low-side switch of OUTB
1h = Overcurrent detected on low-side switch of OUTB
17OCP_HAR0h Overcurrent status on high-side switch of OUTA
0h = No overcurrent detected on high-side switch of OUTA
1h = Overcurrent detected on high-side switch of OUTA
16OCP_LAR0h Overcurrent status on low-side switch of OUTA
0h = No overcurrent detected on low-side switch of OUTA
1h = Overcurrent detected on low-side switch of OUTA
15RESERVEDR0h Reserved
14OTP_ERRR0h OTP error
0h = No OTP error is detected
1h = OTP Error is detected
13BUCK_OCPR0h Buck regulator overcurrent status
0h = No buck regulator overcurrent is detected
1h = Buck regulator overcurrent is detected
12BUCK_UVR0h Buck regulator undervoltage status
0h = No buck regulator undervoltage is detected
1h = Buck regulator undervoltage is detected
11VCP_UVR0h Charge pump undervoltage status
0h = No charge pump undervoltage is detected
1h = Charge pump undervoltage is detected
10-0RESERVEDR0h Reserved

6.8.1.2 CONTROLLER_FAULT_STATUS Register (Offset = E2h) [Reset = 00000000h]

CONTROLLER_FAULT_STATUS is shown in Figure 6-82 and described in Table 6-49.

Return to the Summary Table.

Status of various controller faults

Figure 6-82 CONTROLLER_FAULT_STATUS Register
3130292827262524
CONTROLLER_FAULTRESERVEDIPD_FREQ_FAULTIPD_T1_FAULTIPD_T2_FAULTBUS_CURRENT_LIMIT_STATUSMPET_IPD_FAULTMPET_BEMF_FAULT
R-0hR-0hR-0hR-0hR-0hR-0hR-0hR-0h
2322212019181716
ABN_SPEEDABN_BEMFNO_MTRMTR_LCKLOCK_LIMITHW_LOCK_LIMITMTR_UNDER_VOLTAGEMTR_OVER_VOLTAGE
R-0hR-0hR-0hR-0hR-0hR-0hR-0hR-0h
15141312111098
SPEED_LOOP_SATURATIONCURRENT_LOOP_SATURATIONRESERVED
R-0hR-0hR-0h
76543210
RESERVEDWATCHDOG_FAULTRESERVEDRESERVEDRESERVED
R-0hR-0hR-0hR-0hR-0h
Table 6-49 CONTROLLER_FAULT_STATUS Register Field Descriptions
BitFieldTypeResetDescription
31CONTROLLER_FAULTR0h Logic OR of Controller fault status registers
30RESERVEDR0h Reserved
29IPD_FREQ_FAULTR0h Indicates IPD frequency fault
0h = No IPD frequency fault is detected
1h = IPD frequency fault is detected
28IPD_T1_FAULTR0h Indicates IPD T1 fault
0h = No IPD T1 fault is detected
1h = IPD T1 fault is detected
27IPD_T2_FAULTR0h Indicates IPD T2 fault
0h = No IPD T2 fault is detected
1h = IPD T2 fault is detected
26BUS_CURRENT_LIMIT_STATUSR0h Indicates bus current limit status
0h = Bus current limit is not active
1h = Bus current limit is active
25MPET_IPD_FAULTR0h Indicates error during resistance and inductance measurement
0h = No MPET IPD fault is detected
1h = MPET IPD fault is detected
24MPET_BEMF_FAULTR0h Indicates error during BEMF constant measurement
0h = No MPET BEMF fault is detected
1h = MPET BEMF fault is detected
23ABN_SPEEDR0h Indicates abnormal speed motor lock condition
0h = No abnormal speed fault is detected
1h = Abnormal speed fault is detected
22ABN_BEMFR0h Indicates abnormal BEMF motor lock condition
0h = No abnormal BEMF fault is detected
1h = Abnormal BEMF fault is detected
21NO_MTRR0h Indicates no motor fault
0h = No no motor fault is detected
1h = No motor fault is detected
20MTR_LCKR0h Indicates when one of the motor lock is triggered
0h = No motor lock fault is detected
1h = Motor lock fault is detected
19LOCK_LIMITR0h Indicates lock Ilimit fault
0h = No lock current limit fault is detected
1h = Lock current limit fault is detected
18HW_LOCK_LIMITR0h Indicates hardware lock Ilimit fault
0h = No HW lock current limit fault is detected
1h = HW lock current limit fault is detected
17MTR_UNDER_VOLTAGER0h Indicates motor undervoltage fault
0h = No undervoltage fault is detected
1h = Undervoltage fault is detected
16MTR_OVER_VOLTAGER0h Indicates motor overvoltage fault
0h = No overvoltage fault is detected
1h = Overvoltage fault is detected
15SPEED_LOOP_SATURATIONR0h Indicates speed loop saturation
0h = No speed loop saturation is detected
1h = Speed loop saturation is detected
14CURRENT_LOOP_SATURATIONR0h Indicates current loop saturation
0h = No current loop saturation is detected
1h = Current loop saturation is detected
13-4RESERVEDR0h Reserved
3WATCHDOG_FAULTR0h Indicates watchdog fault
0h = No watchdog timeout is detected
1h = Watchdog timeout is detected
2RESERVEDR0h Reserved
1RESERVEDR0h Reserved
0RESERVEDR0h Reserved