SBOSA00B December   2019  – August 2020 OPA1637

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1 Characterization Configuration
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Super-Beta Input Bipolar Transistors
      2. 8.3.2 Power Down
      3. 8.3.3 Flexible Gain Setting
      4. 8.3.4 Amplifier Overload Power Limit
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Driving Capacitive Loads
      2. 9.1.2 Operating the Power-Down Feature
      3. 9.1.3 I/O Headroom Considerations
      4. 9.1.4 Noise Performance
    2. 9.2 Typical Applications
      1. 9.2.1 Current-Output Audio DAC Buffer to Class-D Amplifier
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
      2. 9.2.2 An MFB Filter Driving an ADC Application
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curves
      3. 9.2.3 Differential Microphone Input to Line Level
        1. 9.2.3.1 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Board Layout Recommendations
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Support Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.1.3 I/O Headroom Considerations

The starting point for most designs is to assign an output common-mode voltage for the OPA1637. For ac-coupled signal paths, this voltage is often the default midsupply voltage to retain the most available output swing around the voltage centered at the VOCM voltage. For dc-coupled designs, set this voltage with consideration to the required minimum headroom to the supplies, as described in the specifications for the VOCM control. For precision ADC drivers, this VOCM output becomes the VCM input to the ADC. Often, VCM is set to VREF / 2 to center the differential input on the available input when precision ADCs are being driven.

From target output VOCM, the next step is to verify that the desired output differential peak-to-peak voltage, VOUTPP, stays within the supplies. For any desired differential VOUTPP, make sure that the absolute maximum voltage at the output pins swings with Equation 1 and Equation 2, and confirm that these expressions are within the supply rails minus the output headroom required for the RRO device.

Equation 1. GUID-6AA20633-D54B-4F28-AA6A-387F270D6901-low.gif
Equation 2. GUID-56E6FF29-063B-450F-9803-454373A55130-low.gif

With the output headroom confirmed, the input junctions must also stay within the operating range. The input range limitations require a maximum 1.0-V headroom from the supply voltages (VS+ and VS–) over the full temperature range.