SBOS940B May   2019  – December 2025 OPA818

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics: VS = ±5 V
    7. 6.7 Typical Characteristics: VS = 6 V
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input and ESD Protection
      2. 7.3.2 Feedback Pin
      3. 7.3.3 Decompensated Architecture With Wide Gain-Bandwidth Product
      4. 7.3.4 Low Input Capacitance
    4. 7.4 Device Functional Modes
      1. 7.4.1 Split-Supply Operation (+4/–2 V to ±6.5 V)
      2. 7.4.2 Single-Supply Operation (6 V to 13 V)
  9. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Wideband, Noninverting Operation
      2. 8.1.2 Wideband, Transimpedance Design Using the OPA818
    2. 8.2 Typical Applications
      1. 8.2.1 High-Bandwidth, 100-kΩ Gain Transimpedance Design
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Noninverting Gain of 2 V/V
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Thermal Considerations
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DRG|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Detailed Design Procedure

Designs that require high bandwidth from a large area detector with relatively high transimpedance gain benefit from the low input voltage noise of the OPA818. This input voltage noise is peaked up over frequency by the diode source capacitance, and in many cases, becomes the limiting factor to input sensitivity. Figure 8-3 shows the transimpedance circuit with the parameters defined in Section 8.2.1.1. To use the Excel calculator available in What You Need To Know About Transimpedance Amplifiers – Part 1 to help with the component selection, determine the total input capacitance, CTOT. In the calculator, CTOT is referred to as CIN. CTOT is the sum of CD, CDIFF, and CCM, which is 7.4 pF. Using this value of CTOT, the targeted closed-loop bandwidth (f–3dB) of 24 MHz, and the transimpedance gain of 100 kΩ results in the need for an amplifier with approximately 2.68 GHz GBWP and a feedback capacitance (CF) of 0.092 pF. Table 8-2 shows the calculator results. These results are for a Butterworth response with a Q = 0.707 and a phase margin of approximately 65°, which corresponds to 4.3% overshoot.

Table 8-2 Results of Inputting Design Parameters in the TIA Calculator
Calculator II
Closed-loop TIA bandwidth (f–3dB) 24.00 MHz
Feedback resistance (RF) 100
Input capacitance (CIN) 7.40 pF
Op-amp gain bandwidth product (GBWP) 2678.14 MHz
Feedback capacitance (CF) 0.092 pF

With a 2.7-GHz GBWP, the OPA818 is an excellent choice for the design requirements. A challenge with the calculated component results is practically realizing a 0.092-pF capacitor. Such a small capacitor is realized by using a capacitive tee network formed by C1, C2, and CT (see Figure 8-3). The equivalent capacitance, CEQ, of the tee network is given by Equation 2:

Equation 2. CEQ = C1 × C2C1 + C2 + CT

The tee network forms a capacitive attenuator from input to output with C1 and CT, and from output to input with C2 and CT. With the value of CT being higher than C1 or C2, only a fraction of the output signal is seen by C1. This network results in a much smaller shunting current provided to the input through C1, and this reduced shunting current effect is equivalent to how a much smaller capacitor behaves. At a fixed frequency, a smaller capacitor has a higher impedance, and thus reduced current. Keep the same level of attenuation from input to output, and vice versa. To find the appropriate capacitor values for the tee network, chose an arbitrarily low but practically realizable and equal values for capacitors C1 and C2, set CEQ = CTOT, and use Equation 3 to get the value of the tunable capacitor, CT. The values of capacitors C1, C2, and CT in Figure 8-3 are determined using this process.

Equation 3. CEQ = C1 × C2  (C1 + C2) × CEQ CEQ

Figure 8-4 shows the TINA-TI™ simulation software closed-loop bandwidth response of the circuit in Figure 8-3. The circuit is designed for f–3dB = 24 MHz and the simulated closed-loop 3-dB frequency is 24.6 MHz with approximately 0.1‑dB peaking. The OPA818 TINA-TI software model models the input common-mode and differential capacitors that are not added externally when simulating in the TINA-TI software. Figure 8-5 shows the noise simulation of the TIA circuit. The output-referred voltage noise shows on the Y-axis to the left. The input-referred current noise, which is essentially output-referred voltage noise divided by the transimpedance gain of 100k, shows on the secondary Y-axis to the right. The simulation results are fairly accurate because the OPA818 TINA-TI software model closely models the voltage and current noise performance of the amplifier. The flat-band output voltage noise is 41 nV/√Hz that is equivalent to 0.41 pA/√Hz of input-referred current noise. The noise in relatively low frequency region where the noise gain of the amplifier is 1 V/V is dominated by the thermal noise of the 100‑kΩ resistor (40.7 nV/√Hz at 27°C). At mid-frequencies beyond the zero formed by RF and CTOT, the noise gain of the amplifier amplifies the voltage noise of the amplifier. The amplifier noise starts to become the dominant noise contributor from this frequency onward, before the output noise starts to roll off at frequencies beyond the 3-dB closed-loop bandwidth. When looking at the integrated root-mean-square (RMS) noise, mid-frequency noise is potentially a significant contributor. Therefore, use a 2.2-nV/√Hz low-noise amplifier, such as the OPA818, to minimize total RMS noise in the system.