SBOS940B May   2019  – December 2025 OPA818

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics: VS = ±5 V
    7. 6.7 Typical Characteristics: VS = 6 V
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input and ESD Protection
      2. 7.3.2 Feedback Pin
      3. 7.3.3 Decompensated Architecture With Wide Gain-Bandwidth Product
      4. 7.3.4 Low Input Capacitance
    4. 7.4 Device Functional Modes
      1. 7.4.1 Split-Supply Operation (+4/–2 V to ±6.5 V)
      2. 7.4.2 Single-Supply Operation (6 V to 13 V)
  9. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Wideband, Noninverting Operation
      2. 8.1.2 Wideband, Transimpedance Design Using the OPA818
    2. 8.2 Typical Applications
      1. 8.2.1 High-Bandwidth, 100-kΩ Gain Transimpedance Design
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Noninverting Gain of 2 V/V
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Thermal Considerations
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DRG|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Noninverting Gain of 2 V/V

The OPA818 is typically stable in noise-gain configurations greater than 7 V/V when conventional feedback networks are used. The OPA818 is configurable in noise gains less than 7 V/V by using capacitors in the feedback path and between the inputs. This configuration maintains the desired gain at lower frequencies and increases the noise gain at higher frequencies such that the amplifier is stable. Configuration (a) in Figure 8-6 shows OPA818 configured in a gain of 2 V/V by using capacitors and resistors to shape the noise gain and achieve a phase margin of approximately 51° that is very close to the phase margin achieved for the conventional 7 V/V configuration (b) in Figure 8-6.

The key benefit of using a decompensated amplifier, such as the OPA818, at gains below the minimum stable gain is that designers can take advantage of the low noise and low distortion performance at power levels lower than those of comparable unity-gain stable architectures. The small-signal frequency response in Figure 8-6 shows flat ac performance beyond 100 MHz for a gain of 2 V/V configuration (a) in Figure 8-8, and by being in a lower gain configuration versus the minimum stable gain configuration of 7 V/V, the output-referred total noise is also lower (64 nV/√Hz at 100 MHz); see also Figure 8-8 compared to that at 166 nV/√Hz of configuration (b). Reducing the 10-pF input capacitor allows the system to achieve higher closed-loop bandwidth at the expense of increased peaking and reduced phase margin. Low-capacitance layout by minimizing trace lengths and removing planes under the traces and components connected to the inverting input is critical to minimize parasitic capacitance (see Layout Guidelines). Parasitic capacitance as small as 1 pF to 2 pF on the inverting input requires tweaking the noise-shaping component values to get flat frequency response and the desired phase margin. Configurations in Figure 8-6 do not take into account this parasitic capacitance but are considered for practical purposes. A 45° phase margin is generally acceptable, but anything less than 40° is not recommended to allow for component, PCB, and process tolerances. Details on the benefits of decompensated architectures are discussed in Using a decompensated op amp for improved performance.

OPA818 Noninverting Gain of 2 V/V and 7 V/V
          Configurations Figure 8-6 Noninverting Gain of 2 V/V and 7 V/V Configurations
OPA818 Small-Signal
            Frequency Response in Gains of 2 V/V and 7 V/V Configurations of Figure 8-6Figure 8-7 Small-Signal Frequency Response in Gains of 2 V/V and 7 V/V Configurations of Figure 8-6
OPA818 Output Noise in
            Gains of 2 V/V and 7 V/V Configurations of Figure 8-6Figure 8-8 Output Noise in Gains of 2 V/V and 7 V/V Configurations of Figure 8-6