SBOS940B May   2019  – December 2025 OPA818

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics: VS = ±5 V
    7. 6.7 Typical Characteristics: VS = 6 V
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input and ESD Protection
      2. 7.3.2 Feedback Pin
      3. 7.3.3 Decompensated Architecture With Wide Gain-Bandwidth Product
      4. 7.3.4 Low Input Capacitance
    4. 7.4 Device Functional Modes
      1. 7.4.1 Split-Supply Operation (+4/–2 V to ±6.5 V)
      2. 7.4.2 Single-Supply Operation (6 V to 13 V)
  9. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Wideband, Noninverting Operation
      2. 8.1.2 Wideband, Transimpedance Design Using the OPA818
    2. 8.2 Typical Applications
      1. 8.2.1 High-Bandwidth, 100-kΩ Gain Transimpedance Design
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Noninverting Gain of 2 V/V
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Thermal Considerations
      2. 8.4.2 Layout Example
  10. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DRG|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Wideband, Noninverting Operation

The OPA818 provides a unique combination of high GBWP, low-input voltage noise, and the dc precision of a trimmed JFET-input stage to provide an exceptionally high input impedance for a voltage-feedback amplifier. The high GBWP of 2.7 GHz is used to either deliver high-signal bandwidths at high gains, or to extend the achievable bandwidth or gain in photodiode-transimpedance applications. To achieve the full performance of the OPA818, pay careful attention to printed circuit board (PCB) layout and component selection; see also the following sections of this data sheet.

Figure 8-1 shows the noninverting gain of +7 V/V circuit used as the basis for most of the Typical Characteristics: VS = ±5 V. Most of the curves are characterized using signal sources with 50-Ω driving impedance, and with measurement equipment presenting a 50-Ω load impedance. In Figure 8-1, the 49.9-Ω shunt resistor at the VIN terminal matches the source impedance of the test generator, while the 49.9-Ω series resistor at the VO terminal provides a matching resistor for the measurement equipment load. Generally, data-sheet voltage-swing specifications are at the output pin (VO in Figure 8-1) while output power specifications are at the matched 50‑Ω load. The total 100-Ω load at the output combined with the 350-Ω total feedback network load, presents the OPA818 with an effective output load of 78 Ω for the circuit of Figure 8-1.

OPA818 Noninverting G = +7 V/V Configuration and Test Circuit Figure 8-1 Noninverting G = +7 V/V Configuration and Test Circuit

Voltage-feedback operational amplifiers, unlike current feedback products, use a wide range of resistor values to set gain. To retain a controlled frequency response for the noninverting voltage amplifier of Figure 8-1, ensure that the parallel combination of RF || RG is less than 50 Ω. In the noninverting configuration, the parallel combination of RF || RG forms a pole with the parasitic input capacitance at the inverting node of the OPA818 (including layout parasitics). For best performance, set this pole to a frequency greater than the closed-loop bandwidth for the OPA818.