SBOS622A July   2018  – October 2018 OPA855

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      High-Speed Time-of-Flight Receiver
      2.      Photodiode Capacitance vs Bandwidth and Noise
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Parameter Measurement Information
    1. 8.1 Parameter Measurement Information
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Input and ESD Protection
      2. 9.3.2 Feedback Pin
      3. 9.3.3 Wide Gain-Bandwidth Product
      4. 9.3.4 Slew Rate and Output Stage
    4. 9.4 Device Functional Modes
      1. 9.4.1 Split-Supply and Single-Supply Operation
      2. 9.4.2 Power-Down Mode
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Development Support
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 Community Resources
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Functional Block Diagram

The OPA855 is a classic, voltage feedback operational amplifier (op amp) with two high-impedance inputs and a low-impedance output. Standard application circuits are supported, like the two basic options shown in Figure 46 and Figure 47.The resistor on the noninverting pin is used for bias current cancellation to minimize the output offset voltage. In a noninverting configuration the additional resistors on the noninverting pin add noise to the system so if SNR is critical, the resistor can be eliminated. In an inverting configuration the noninverting node is typically connected to a DC voltage, so the high-frequency noise contribution from the bias cancellation resistor can be bypassed by adding a large 1-µF capacitor in parallel to the resistor to shunt the noise. The DC operating point for each configuration is level-shifted by the reference voltage (VREF), which is typically set to midsupply in single-supply operation. VREF is typically connected to ground in split-supply applications.

OPA855 noninv_amp_bjt.gifFigure 46. Noninverting Amplifier
OPA855 inv_amp_bjt.gifFigure 47. Inverting Amplifier