SBAS495D June 2010 – August 2021 PCM9211
PRODUCTION DATA
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
GIOB3DIR | GIOB2DIR | GIOB1DIR | GIOB0DIR | GIOA3DIR | GIOA2DIR | GIOA1DIR | GIOA0DIR |
R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
GIOB3DIR: MPIO_B3 Pin, GPIO I/O Direction Control | ||
0: | Input (default) | |
1: | Output | |
GIOB2DIR: MPIO_B2 Pin, GPIO I/O Direction Control | ||
0: | Input (default) | |
1: | Output | |
GIOB1DIR: MPIO_B1 Pin, GPIO I/O Direction Control | ||
0: | Input (default) | |
1: | Output | |
GIOB0DIR: MPIO_B0 Pin, GPIO I/O Direction Control | ||
0: | Input (default) | |
1: | Output | |
GIOA3DIR: MPIO_A3 Pin Function, GPIO I/O Direction Control | ||
0: | Input (default) | |
1: | Output | |
GIOA2DIR: MPIO_A2 Pin Function, GPIO I/O Direction Control | ||
0: | Input (default) | |
1: | Output | |
GIOA`DIR: MPIO_A1 Pin Function, GPIO I/O Direction Control | ||
0: | Input (default) | |
1: | Output | |
GIOA0DIR: MPIO_A0 Pin Function, GPIO I/O Direction Control | ||
0: | Input (default) | |
1: | Output |
These registers are effective only at MPIO_A and MPIO_B assigned as GPIO. I/O direction setting is available by pin.