SBAS495D June 2010 – August 2021 PCM9211
PRODUCTION DATA
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
MPB3FLG3 | MPB3FLG2 | MPB3FLG1 | MPB3FLG0 | MPB2FLG3 | MPB2FLG2 | MPB2FLG1 | MPB2FLG0 |
R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
MPB3FLG[3:0]: MPIO_B3 Pin, Flag Select | ||
0000: | CLKST (default) | |
0001: | EMPH | |
0010: | BPSYNC | |
0011: | DTSCD | |
0100: | PARITY | |
0101: | LOCK | |
0110: | VOUT | |
0111: | UOUT | |
1000: | COUT | |
1001: | BFRAME | |
1010: | FSOUT0 | |
1011: | FSOUT1 | |
1100: | FSOUT2 | |
1101: | FSOUT3 | |
1110: | INT0 | |
1111: | INT1 | |
MPB2FLG[3:0]: MPIO_B2 Pin, Flag Select | ||
0000: | CLKST (default) | |
0001: | EMPH | |
0010: | BPSYNC | |
0011: | DTSCD | |
0100: | PARITY | |
0101: | LOCK | |
0110: | VOUT | |
0111: | UOUT | |
1000: | COUT | |
1001: | BFRAME | |
1010: | FSOUT0 | |
1011: | FSOUT1 | |
1100: | FSOUT2 | |
1101: | FSOUT3 | |
1110: | INT0 | |
1111: | INT1 |
These register settings are effective only at MPBSEL[2:0] = 011, MPB3SEL = 0, and MPB2SEL = 0.