SNVSCN7C November   2023  – May 2025 REF54

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics REF54250
    6. 6.6  Electrical Characteristics REF54300
    7. 6.7  Electrical Characteristics REF54410
    8. 6.8  Electrical Characteristics REF54450
    9. 6.9  Electrical Characteristics REF54500
    10. 6.10 Typical Characteristics
  8. 7 Parameter Measurement Information
    1. 7.1 Temperature Drift
    2. 7.2 Long-Term Stability
    3. 7.3 Noise Performance
      1. 7.3.1 1/f Noise
      2. 7.3.2 Broadband Noise
    4. 7.4 Thermal Hysteresis
    5. 7.5 Solder Heat Shift
    6. 7.6 Power Dissipation
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 EN Pin
      2. 8.3.2 NR Pin
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Basic Voltage Reference Connection
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Reference Attach With High Precision ADC
    3. 9.3 Power Supply Recommendation
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

REF54 D Package 8-Pin SOIC , VSSOPTop ViewFigure 5-1 D Package
8-Pin SOIC , VSSOP
Top View
REF54 FKH Package 8-Pin LCCC Top ViewFigure 5-2 FKH Package
8-Pin LCCC
Top View
Table 5-1 Pin Functions
PIN TYPE DESCRIPTION
NAME D FKH
EN 1 Input Device enable control. Low level input disables the reference output and device enters shutdown mode. Device can be enabled by driving voltage > 1.6V or leaving the EN pin floating. See section Section 8.3.1 for additional details.
VIN 2 2 Power Input supply voltage connection. Connect a minimum 0.1μF decoupling capacitor to ground for the best performance. See section Section 9.3 for additional details.
NIC 3 No Connect Not internally connected. Pin can be left floating or to a known potential.
GND_F 3 Ground Gorund connection
GND 4 Ground Ground connection.
GND_S 4 Ground Ground sense connection.
NR 5 1 Output Noise reduction pin. Connect a decoupling capacitor to ground for improved noise performance. The pin can be left floating. See section Section 8.3.2 for additional details.
NC 5,8 NC Connect this pin to Ground or leave floating.
VREF 6 Output Reference voltage output. Connect a capacitor between 1μF to 100μF to ground for best performance.
VREF_S 6 Output Reference voltage output sense connection.
VREF_F 7 Output Reference voltage output force connection. Connect a output capacitor between 1μF to 100μF for the best performance.
DNC 7, 8 Do not Connect Leave the pin floating or connect to ground