SLLS631E April   2007  – August 2015 SN65HVD1040

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Driver Electrical Characteristics
    6. 7.6  Receiver Electrical Characteristics
    7. 7.7  Device Switching Characteristics
    8. 7.8  Driver Switching Characteristics
    9. 7.9  Receiver Switching Characteristics
    10. 7.10 Dissipation Ratings
    11. 7.11 Supply Current
    12. 7.12 Split-Pin Characteristics
    13. 7.13 STB-Pin Characteristics
    14. 7.14 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Mode Control
        1. 9.3.1.1 High-Speed Mode
        2. 9.3.1.2 Low-Power Mode
      2. 9.3.2 Dominant State Time-Out
      3. 9.3.3 Thermal Shutdown
      4. 9.3.4 SPLIT
      5. 9.3.5 Operating Temperature Range
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
        1. 10.2.1.1 Bus Loading, Length, and Number of Nodes
        2. 10.2.1.2 CAN Termination
        3. 10.2.1.3 Loop Propagation Delay
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 CAN Basics
          1. 10.2.2.1.1 Differential Signal
          2. 10.2.2.1.2 Common-Mode Signal
          3. 10.2.2.1.3 ESD Protection
          4. 10.2.2.1.4 Transient Voltage Suppresser (TVS) Diodes
      3. 10.2.3 Application Curve
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Community Resources
    2. 13.2 Trademarks
    3. 13.3 Electrostatic Discharge Caution
    4. 13.4 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Description (continued)

The STB input (pin 8) selects between two different modes of operation; high-speed or low-power mode. The high-speed mode of operation is selected by connecting STB to ground.

If a high logic level is applied to the STB pin of the SN65HVD1040, the device enters a low-power bus-monitor standby mode. While the SN65HVD1040 is in the low-power bus-monitor standby mode, a dominant bit greater than 5 μs on the bus is passed by the bus-monitor circuit to the receiver output. The local protocol controller may then reactivate the device when it needs to transmit to the bus.

A dominant time-out circuit in the SN65HVD1040 prevents the driver from blocking network communication during a hardware or software failure. The time-out circuit is triggered by a falling edge on TXD (pin 1). If no rising edge is seen before the time-out constant of the circuit expires, the driver is disabled. The circuit is then reset by the next rising edge on TXD.

The SPLIT output (pin 5) is available on the SN65HVD1040 as a VCC/2 common-mode bus voltage bias for a split-termination network.

The SN65HVD1040 is characterized for operation from –40°C to 125°C.