SLLS562L August   2009  – November 2021 SN65HVD3082E , SN65HVD3085E , SN65HVD3088E , SN75HVD3082E

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Thermal Information
    6. 6.6  Electrical Characteristics: Driver
    7. 6.7  Electrical Characteristics: Receiver
    8. 6.8  Electrical Characteristics
    9. 6.9  Switching Characteristics: Driver
    10. 6.10 Switching Characteristics
    11. 6.11 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Data Rate and Bus Length
        2. 9.2.1.2 Stub Length
        3. 9.2.1.3 Bus Loading
        4. 9.2.1.4 Receiver Failsafe
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Power Usage in an RS-485 Transceiver
        2. 9.2.2.2 Low-Power Shutdown Mode
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations for IC Packages
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Related Links
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Support Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Receiver Failsafe

The differential receiver is failsafe to invalid bus states caused by:

  • open bus conditions such as a disconnected connector,
  • shorted bus conditions such as cable damage shorting the twisted-pair together, or
  • idle bus conditions that occur when no driver on the bus is actively driving
In any of these cases, the differential receiver outputs a failsafe logic High state, so that the output of the receiver is not indeterminate.

Receiver failsafe is accomplished by offsetting the receiver thresholds so that the input indeterminate range does not include zero volts differential. To comply with the RS-422 and RS-485 standards, the receiver output must output a High when the differential input VID is more positive than +200 mV, and must output a Low when the VID is more negative than –200 mV. The receiver parameters which determine the failsafe performance are VIT+ and VIT– and VHYS. As seen in the table, differential signals more negative than –200 mV will always cause a Low receiver output. Similarly, differential signals more positive than +200 mV will always cause a High receiver output.

When the differential input signal is close to zero, it will still be above the VIT+ threshold, and the receiver output is High. Only when the differential input is more negative than VIT– will the receiver output transition to a Low state. So, the noise immunity of the receiver inputs during a bus fault condition includes the receiver hysteresis value VHYS (the separation between VIT+ and VIT– ) as well as the value of VIT+.