SLLS562M August   2009  – February 2022 SN65HVD3082E , SN65HVD3085E , SN65HVD3088E , SN75HVD3082E


  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information, SN65HVD308xE
    5. 6.5  Thermal Information, SNx5HVD3082E
    6. 6.6  Electrical Characteristics: Driver
    7. 6.7  Electrical Characteristics: Receiver
    8. 6.8  Electrical Characteristics
    9. 6.9  Switching Characteristics: Driver
    10. 6.10 Switching Characteristics
    11. 6.11 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. Data Rate and Bus Length
        2. Stub Length
        3. Bus Loading
        4. Receiver Fail-safe
      2. 9.2.2 Detailed Design Procedure
        1. Power Usage in an RS-485 Transceiver
        2. Low-Power Shutdown Mode
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations for IC Packages
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Related Links
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Support Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Device Functional Modes

When the driver enable pin, DE, is logic high, the differential outputs A and B follow the logic states at data input D. A logic high at D causes A to turn high and B to turn low. In this case the differential output voltage defined as VOD = VA – VB is positive. When D is low, the output states reverse, B turns high, A becomes low, and VOD is negative.

When DE is low, both outputs turn high-impedance. In this condition the logic state at D is irrelevant. The DE pin has an internal pull-down resistor to ground, thus when left open the driver is disabled (high-impedance) by default. The D pin has an internal pull-up resistor to VCC, thus, when left open while the driver is enabled, output A turns high and B turns low.

Table 8-1 Driver Function Table
HHHLActively drive bus High
LHLHActively drive bus Low
XLZZDriver disabled
XOPENZZDriver disabled by default
OPENHHLActively drive bus High by default
H = high level, L = low level, Z = high impedance, X = irrelevant

When the receiver enable pin, RE, is logic low, the receiver is enabled. When the differential input voltage defined as VID = VA – VB is positive and higher than the positive input threshold, VIT+, the receiver output, R, turns high. When VID is negative and lower than the negative input threshold, VIT–, the receiver output, R, turns low. If VID is between VIT+ and VIT– the output is indeterminate.

When RE is logic high or left open, the receiver output is high-impedance and the magnitude and polarity of VID are irrelevant. Internal biasing of the receiver inputs causes the output to go failsafe-high when the transceiver is disconnected from the bus (open-circuit), the bus lines are shorted (short-circuit), or the bus is not actively driven (idle bus).

Table 8-2 Receiver Function Table
VIT+ < VIDLHReceive valid bus High
VIT– < VID < VIT+L?Indeterminate bus state
VID < VIT–LLReceive valid bus Low
XHZReceiver disabled
XOPENZReceiver disabled by default
Open-circuit busLHFail-safe high output
Short-circuit busLHFail-safe high output
Idle (terminated) busLHFail-safe high output
H = high level, L = low level, Z = high impedance, X = irrelevant, ? = indeterminate