SLLSFG7B September 2020 – November 2022 SN65MLVD203B
PRODUCTION DATA
PARAMETER | TEST CONDITIONS | MIN | TYP(1) | MAX | UNIT | |
---|---|---|---|---|---|---|
tpLH | Propagation delay time, low-to-high-level output | See Figure 7-5 | 2 | 2.5 | 3.5 | ns |
tpHL | Propagation delay time, high-to-low-level output | 2 | 2.5 | 3.5 | ns | |
tr | Differential output signal rise time | 2.0 | ns | |||
tf | Differential output signal fall time | 2.0 | ns | |||
tsk(pp) | Part-to-part skew (2) | 0.9 | ns | |||
tjit(per) | Period jitter, rms (1 standard deviation)(3) | 62.5-MHz clock input(4) | 5 | ps | ||
tjit(per) | Period jitter, rms (1 standard deviation)(3) | 100-MHz clock input(4) | 2 | ps | ||
tjit(pp) | Peak-to-peak jitter(3) (6) | 125 Mbps 8b10b input(5) | 250 | ps | ||
tjit(pp) | Peak-to-peak jitter(3) (6) | 200 Mbps 8b10b input(5) | 325 | ps | ||
tjit(pp) | Peak-to-peak jitter(3) (6) | 200 Mbps 215 –1 PRBS input(5) | 325 | ps | ||
tPHZ | Disable time, high-level-to-high-impedance output | See Figure 7-6 | 5 | 7 | ns | |
tPLZ | Disable time, low-level-to-high-impedance output | 5 | 7 | ns | ||
tPZH | Enable time, high-impedance-to-high-level output | 4 | 7 | ns | ||
tPZL | Enable time, high-impedance-to-low-level output | 4 | 7 | ns |