SCLS226N October   1995  – June 2025 SN54AHC244 , SN74AHC244

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics
    6. 5.6  Switching Characteristics, VCC = 3.3V ± 0.3V
    7. 5.7  Switching Characteristics, VCC = 5V ± 0.5V
    8. 5.8  Noise Characteristics
    9. 5.9  Operating Characteristics
    10. 5.10 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Balanced CMOS Push-Pull Outputs
      2. 7.3.2 Balanced CMOS 3-State Outputs
      3. 7.3.3 Standard CMOS Inputs
      4. 7.3.4 Clamp Diode Structure
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DGV|20
  • DB|20
  • RKS|20
  • NS|20
  • N|20
  • DGS|20
  • DW|20
  • PW|20
Thermal pad, mechanical data (Package|Pins)
Orderable Information

4 Pin Configuration and Functions

SN54AHC244 SN74AHC244 SN54AHC244 J or W Package, 20-Pin CDIP or CFP (Top View)Figure 4-1 SN54AHC244 J or W Package, 20-Pin CDIP or CFP (Top View)
SN54AHC244 SN74AHC244 SN74AHC244 DB, DGV, DW, N, NS, PW or DGS Package, 20-Pin SSOP, TVSOP, SOIC, PDIP, SOP, TSSOP or VSSOP (Top View)Figure 4-3 SN74AHC244 DB, DGV, DW, N, NS, PW or DGS Package, 20-Pin SSOP, TVSOP, SOIC, PDIP, SOP, TSSOP or VSSOP (Top View)
SN54AHC244 SN74AHC244 SN54AHC244 FK Package, 20-Pin LCCC (Top View)Figure 4-2 SN54AHC244 FK Package, 20-Pin LCCC (Top View)
SN54AHC244 SN74AHC244 SN74AHC244 RKS Package; 20-Pin VQFN (Top View)Figure 4-4 SN74AHC244 RKS Package; 20-Pin VQFN (Top View)
Table 4-1 Pin Functions
PIN TYPE(1) DESCRIPTION
NO. NAME
1 1 OE I Output Enable 1
2 1A1 I 1A1 Input
3 2Y4 O 2Y4 Output
4 1A2 I 1A2 Input
5 2Y3 O 2Y3 Output
6 1A3 I 1A3 Input
7 2Y2 O 2Y2 Output
8 1A4 I 1A4 Input
9 2Y1 O 2Y1 Output
10 GND — Ground pin
11 2A1 I 2A1 Input
12 1Y4 O 1Y4 Output
13 2A2 I 2A2 Input
14 1Y3 O 1Y3 Output
15 2A3 I 2A3 Input
16 1Y2 O 1Y2 Output
17 2A4 I 2A4 Input
18 1Y1 O 1Y1 Output
19 2 OE I Output Enable 2
20 VCC — Power Pin
Thermal pad(2) The thermal pad can be connected to GND or left floating. Do not connect to any other signal or supply
(1) Signal Types: I = Input, O = Output, I/O = Input or Output
(2) RKS package only