SCLS130H December   1982  – February 2025 SN54HC244 , SN74HC244

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics
    6. 5.6  Electrical Characteristics – SN54HC244
    7. 5.7  Electrical Characteristics – SN74HC244
    8. 5.8  Switching Characteristics
    9. 5.9  Switching Characteristics – CL = 50 pF
    10. 5.10 Switching Characteristics – CL = 150 pF
    11. 5.11 Typical Characteristic
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Standard CMOS Inputs
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout Guidelines
      1. 8.4.1 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Links
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DB|20
  • NS|20
  • N|20
  • PW|20
  • DW|20
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Parameter Measurement Information

SN54HC244 SN74HC244 Load CircuitFigure 6-1 Load Circuit
SN54HC244 SN74HC244 Propagation Delay and Output Transition TimesFigure 6-2 Propagation Delay and
Output Transition Times
SN54HC244 SN74HC244 Input Rise and Fall TimesFigure 6-3 Input Rise and Fall Times
SN54HC244 SN74HC244 Enable and Disable Times for 3-State OutputsFigure 6-4 Enable and Disable Times
for 3-State Outputs
Note: NOTE:

A. CL includes probe and test-fixture capacitance.

B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.

C. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns.

D. The outputs are measured one at a time with one input transition per measurement.

E. tPLZ and tPHZ are the same as tdis.

F. tPZL and tPZH are the same as ten.

G. tPLH and tPHL are the same as tpd.

Table 6-1 Switching Information Table
PARAMETERRLCLS1S2
tentPZH1 kΩ50 pF or 150 pFOpenClosed
tPZL1 kΩ50 pF or 150 pFClosedOpen
tdistPHZ1 kΩ50 pFOpenClosed
tPLZ1 kΩ50 pFClosedOpen
tpd or tt—50 pF or 150 pFOpenOpen