SCLS399O april   1998  – august 2023 SN74LV273A

PRODMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configurations and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Timing Requirements, VCC = 2.5 V ± 0.2 V
    7. 6.7  Timing Requirements, VCC = 3.3 V ± 0.3 V
    8. 6.8  Timing Requirements, VCC = 5 V ± 0.5 V
    9. 6.9  Switching Characteristics, VCC = 2.5 V ± 0.2 V
    10. 6.10 Switching Characteristics, VCC = 3.3 V ± 0.3 V
    11. 6.11 Switching Characteristics, VCC = 5 V ± 0.5 V
    12. 6.12 Noise Characteristics
    13. 6.13 Operating Characteristics
    14. 6.14 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Balanced CMOS Push-Pull Outputs
      2. 8.3.2 Latching Logic
      3. 8.3.3 Partial Power Down (Ioff)
      4. 8.3.4 Clamp Diode Structure
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Power Considerations
      2. 9.2.2 Input Considerations
      3. 9.2.3 Output Considerations
      4. 9.2.4 Detailed Design Procedure
      5. 9.2.5 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configurations and Functions

GUID-20221103-SS0I-NXP7-SCQ7-PDMWGVZCPQQM-low.svgFigure 5-1 SN74LV273A DB, DGV, DW, NS, PW, or DGS Package, 20-Pin SSOP, TVSOP, SOP, TSSOP, or VSSOP (Top View)
GUID-20221103-SS0I-BPMP-BC7C-5TF256K96BXN-low.svgFigure 5-2 SN74LV273A RGY or RKS Package, 20-Pin VQFN (Top View)
Table 5-1 Pin Functions
PIN TYPE(1) DESCRIPTION
NAME NO.
CLR 1 I Clear Pin
1Q 2 O 1Q Output
1D 3 I 1D Input
2D 4 I 2D Input
2Q 5 O 2Q Output
3Q 6 O 3Q Output
3D 7 I 3D Input
4D 8 I 4D Input
4Q 9 O 4Q Output
GND 10 — Ground Pin
CLK 11 I Clock Pin
5Q 12 O 5Q Output
5D 13 I 5D Input
6D 14 I 6D Input
6Q 15 O 6Q Output
7Q 16 O 7Q Output
7D 17 I 7D Input
8D 18 I 8D Input
8Q 19 O 8Q Output
VCC 20 — Power Pin
Thermal Pad — Thermal Pad(2)
(1) I = input, O = output
(2) RKS package only
GUID-C6125FA3-6539-4BE9-9D53-19F9CB1A6E84-low.svg Figure 5-3 GQN or ZQN Package, 20-Pin BGA (Top View)
Table 5-2 GQN or ZQN Pin Assignments
1 2 3 4
A 1Q CLR VCC 8Q
B 2D 7D 1D 8D
C 3Q 2Q 6Q 7Q
D 4D 5D 3D 6D
E GND 4Q CLK 5Q