SBFS022C June   2003  – October 2015 SRC4192 , SRC4193

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input Port Operation
      2. 7.3.2 Output Port Operation
      3. 7.3.3 Soft Mute Function
      4. 7.3.4 Digital Attenuation (SRC4193 Only)
      5. 7.3.5 Ready Output
      6. 7.3.6 Ratio Output (SRC4193 Only)
      7. 7.3.7 Serial Peripheral Interface (SPI) Port: SRC4193 Only
    4. 7.4 Device Functional Modes
      1. 7.4.1 Reset and Power Down Operation
      2. 7.4.2 Audio Port Modes
      3. 7.4.3 Bypass Mode
    5. 7.5 Register Maps
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Interfacing to Digital Audio Receivers and Transmitters
      2. 8.1.2 TDM Applications
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Control Method
        2. 8.2.2.2 Audio Input and Output
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Reference Clock
      2. 10.1.2 Pin Compatibility With the Analog Devices AD1896 (SRC4192 Only)
        1. 10.1.2.1 Crystal Oscillator
        2. 10.1.2.2 Reference Clock Frequency
        3. 10.1.2.3 Master Mode Maximum Sampling Frequency
        4. 10.1.2.4 Matched Phase Mode
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Related Links
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DB|28
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9 Power Supply Recommendations

To ensure compatibility, the VDD_IO and VDD_CORE supplies of the AD1896 device must be set to 3.3 V, while the VIO and VDD supplies of the SRC4192 device must be set to 3.3 V.