SLOS616D March   2010  – March 2015 THS788

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Simplified Schematic
  5. 5 Revision History
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Host Serial Interface DC Characteristics
    7. 7.7 Host Serial Interface AC Characteristics
    8. 7.8 Power Consumption
    9. 7.9 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Counter, Latches, Clock Multiplier
      2. 8.3.2 Channels, Interpolator
      3. 8.3.3 FIFO
      4. 8.3.4 Calibration, ALU, Tag, Shifter
      5. 8.3.5 Serial Interface, Temperature, Overhead
    4. 8.4 Device Functional Modes
      1. 8.4.1 Serial-Results Interface
      2. 8.4.2 Result-Interface Clock
      3. 8.4.3 DDR Mode
      4. 8.4.4 Output Interface Throughput
      5. 8.4.5 Counter Range
        1. 8.4.5.1 Preconditioning Holdoff Delay Time
        2. 8.4.5.2 Arming Conditions
      6. 8.4.6 Resister Map Descriptions for All Channels and Central Register
    5. 8.5 Programming
      1. 8.5.1 Host Processor Bus Interface
        1. 8.5.1.1  Serial Interface
        2. 8.5.1.2  Read vs Write Cycle
        3. 8.5.1.3  Parallel (Broadcast) Write
        4. 8.5.1.4  Address
        5. 8.5.1.5  Data
        6. 8.5.1.6  Reset
        7. 8.5.1.7  Chip ID
        8. 8.5.1.8  Read Operations
        9. 8.5.1.9  Write Operations
        10. 8.5.1.10 Write Operations to Multiple Destinations
      2. 8.5.2 Serial-Results Interface and ALU
        1. 8.5.2.1 Event Latches
        2. 8.5.2.2 FIFO
        3. 8.5.2.3 Result-Interface Operation
        4. 8.5.2.4 Serial Results Latency
        5. 8.5.2.5 TMU Calibration
        6. 8.5.2.6 Temperature Sensor
    6. 8.6 Register Maps
      1. 8.6.1 Register Address Space
      2. 8.6.2 Register Map Detail
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedures
        1. 9.2.2.1 Time Measurement
        2. 9.2.2.2 Output Clock to Data/Strobe Phasing
        3. 9.2.2.3 Master Clock Input and Clock Multiplier
        4. 9.2.2.4 Temperature Measurement and Alarm Circuit
        5. 9.2.2.5 LVDS-Compatible I/Os
        6. 9.2.2.6 LVDS-Compatible Inputs
        7. 9.2.2.7 LVDS-Compatible Outputs
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations
  12. 12Device and Documentation Support
    1. 12.1 Trademarks
    2. 12.2 Electrostatic Discharge Caution
    3. 12.3 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

13 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.