SLOS588G June   2008  – May 2025

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings #GUID-CD5A394D-84DA-49EE-9F1D-C347D3339D1D/SLOS4567624
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 TL4050x20-Q1 Electrical Characteristics
    6. 5.6 TL4050x25-Q1 Electrical Characteristics
    7. 5.7 TL4050x41-Q1 Electrical Characteristics
    8. 5.8 TL4050x50-Q1 Electrical Characteristics
    9. 5.9 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Functional Block Diagram
  8. 7 Application Information
    1. 7.1 Output Capacitor
    2. 7.2 SOT-23-3 Pin Connections
    3. 7.3 Use With ADCs or DACs
    4. 7.4 Cathode and Load Currents
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.4 Thermal Information

THERMAL METRIC#TL4050-Q1UNIT
DBZDCK
3 PINS5 PINS
θJAJunction-to-ambient thermal resistance#331.1289.9°C/W
θJCtopJunction-to-case (top) thermal resistance#107.556.4°C/W
θJBJunction-to-board thermal resistance#63.493°C/W
ψJTJunction-to-top characterization parameter#4.90.7°C/W
ψJBJunction-to-board characterization parameter#61.791.4°C/W
θJCbotJunction-to-case (bottom) thermal resistance#N/AN/A°C/W