SGLS199C January   2004  – July 2025 TLE2021-Q1 , TLE2021A-Q1 , TLE2022-Q1 , TLE2022A-Q1 , TLE2024-Q1

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Pin Configuration and Functions
  6. 5Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  Recommended Operating Conditions
    3. 5.3  Thermal Information for TLE2021-Q1
    4. 5.4  Thermal Information for TLE2022-Q1
    5. 5.5  Thermal Information for TLE2024-Q1
    6. 5.6  Electrical Characteristics for TLE2021-Q1, VCC = ±15V
    7. 5.7  Electrical Characteristics for TLE2021-Q1, VCC = 5V
    8. 5.8  Electrical Characteristics for TLE2022-Q1, VCC = ±15V
    9. 5.9  Electrical Characteristics for TLE2022-Q1, VCC = 5V
    10. 5.10 Electrical Characteristics for TLE2024-Q1, VCC = ±15V
    11. 5.11 Electrical Characteristics for TLE2024-Q1, VCC = 5V
    12. 5.12 Typical Characteristics
  7. 6Application and Implementation
    1. 6.1 Application Information
      1. 6.1.1 Voltage-Follower Applications
      2. 6.1.2 Input Offset Voltage Null
    2. 6.2 Layout
      1. 6.2.1 Layout Guidelines
      2. 6.2.2 Layout Example
  8. 7Device and Documentation Support
    1. 7.1 Receiving Notification of Documentation Updates
    2. 7.2 Support Resources
    3. 7.3 Trademarks
    4. 7.4 Electrostatic Discharge Caution
    5. 7.5 Glossary
  9. 8Revision History
  10. 9Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Electrical Characteristics for TLE2021-Q1, VCC = ±15V

at TA = 25°C, VCC = ±15V, and VIC = VOUT = VCC / 2 (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
DC SPECS
VIO Input offset voltage  TLE2021-Q1
RS = 50Ω 
±120 ±500 µV
TA = –40°C to +125°C ±700
TLE2021A-Q1
RS = 50Ω
±80 ±300
TA = –40°C to +125°C ±450
dVIO/dT Input offset voltage drift RS = 50Ω, TA = –40°C to +125°C  ±2 µV/°C
IIB Input bias current RS = 50Ω 25 70 nA
TA = –40°C to +125°C  90
IIO Input offset current RS = 50Ω 0.2 6 nA
TA = –40°C to +125°C 10
PSRR Power-supply rejection ratio VCC± = ±2.5V to ±15V 105 120 dB
TA = –40°C to +125°C 100
AVD Large signal voltage gain VO = ±10V, RL = 10kΩ 1 6.5 V/µV
TA = –40°C to +125°C 0.5
VICR Common-mode input voltage range To positive rail
RS = 50Ω
13.5 14 V
TA = –40°C to +125°C 13.2
To negative rail
RS = 50Ω  
–15.3 –15
TA = –40°C to +125°C –15
CMRR Common-mode rejection ratio VIC = VICRmin, RS = 50Ω 100 115 dB
TA = –40°C to +125°C 96
VO Output voltage swing To positive rail
RL = 10kΩ 
14 14.3 V
TA = –40°C to +125°C 13.8
To negative rail
RL = 10kΩ
–14.1 –13.7
TA = –40°C to +125°C –13.6
ICC Supply current No load   200 350 µA
TA = –40°C to +125°C 350
AC SPECS
SR Slew rate VO = ±10V, G = 1   0.65 V/µs
Vn Input voltage noise density f = 10Hz 19 nV/√Hz
f = 1kHz 15
VN Input voltage noise f = 0.1Hz to 1Hz 0.16 µVPP
f = 0.1Hz to 10Hz 0.47
In Input current noise density 0.09 pA/√Hz
B1 Gain bandwidth 2 MHz
Θm Phase margin 46°