SBOS784C November 2016 – January 2019 TLV172 , TLV2172 , TLV4172

PRODUCTION DATA.

- 1 Features
- 2 Applications
- 3 Description
- 4 Revision History
- 5 Device Comparison Table
- 6 Pin Configuration and Functions
- 7 Specifications
- 8 Detailed Description
- 9 Application and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information

Figure 29 shows a unity-gain buffer driving a capacitive load. Equation 1 shows the transfer function for the circuit in Figure 29.Figure 29 does not show the open-loop output resistance of the operational amplifier (R_{o}).

Equation 1.

The transfer function in Equation 1 has a pole and a zero. The frequency of the pole (f_{p}) is determined by (R_{o} + R_{ISO}) and C_{LOAD}. The R_{ISO} and C_{LOAD} components determine the frequency of the zero (f_{z}). A stable system is obtained by selecting R_{ISO} so that the rate of closure (ROC) between the open-loop gain (A_{OL}) and 1/β is 20 dB per decade. Figure 30 shows the concept. The 1/β curve for a unity-gain buffer is 0 dB.

Typically, ROC stability analysis is simulated. The validity of the analysis depends on multiple factors, especially the accurate modeling of R_{o}. In addition to simulating the ROC, a robust stability analysis includes a measurement of overshoot percentage and AC gain peaking of the circuit using a function generator, oscilloscope, and gain and phase analyzer. Phase margin is then calculated from these measurements. Table 3 shows the overshoot percentage and AC gain peaking that correspond to phase margins of 45° and 60°. For more details on this design and other alternative devices that can replace the TLVx172, see the *Capacitive Load Drive Solution Using an Isolation Resistor* precision design.

PHASE MARGIN | OVERSHOOT | AC GAIN PEAKING |
---|---|---|

45° | 23.3% | 2.35 dB |

60° | 8.8% | 0.28 dB |