SBOSA91B December   2021  – December 2023 TLV2387 , TLV387 , TLV4387

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information: TLV387
    5. 5.5 Thermal Information: TLV2387
    6. 5.6 Thermal Information: TLV4387
    7. 5.7 Electrical Characteristics
    8. 5.8 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Input Bias Current
      2. 6.3.2 EMI Susceptibility and Input Filtering
    4. 6.4 Device Functional Modes
  8. Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Zero-Drift Clocking
    2. 7.2 Typical Applications
      1. 7.2.1 Bidirectional Current Sensing
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curve
      2. 7.2.2 Load Cell Measurement
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 PSpice® for TI
        2. 8.1.1.2 TINA-TI™ Simulation Software (Free Download)
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • PW|14
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Detailed Design Procedure

The load current, ILOAD, flows through the shunt resistor, RSHUNT, to develop the shunt voltage, VSHUNT. The shunt voltage is then amplified by the difference amplifier consisting of U1A and R1 through R4. The gain of the difference amplifier is set by the ratio of R4 to R3. To minimize errors, set R2 = R4 and R1 = R3. The reference voltage, VREF, is supplied by buffering a resistor divider using U1B. The transfer function is given by Equation 1.

Equation 1. GUID-D008C711-28B0-450B-B784-F4140ED37F4F-low.gif

where

  • GUID-8BCE5457-8ACB-42FB-9432-9612F25817C7-low.gif
  • GUID-75B2D2B5-AE28-4C23-B0F9-CCCC5D626361-low.gif
  • GUID-B909F0FA-21B4-4D04-9460-0DAEE10847C4-low.gif

There are two types of errors in this design: gain and offset. Gain errors are introduced by the tolerance of the shunt resistor and the ratios of R4 to R3 and, similarly, R2 to R1. Offset errors are introduced by the voltage divider (R5 and R6) and how closely the ratio of R4 / R3 matches R2 / R1. The latter value affects the CMRR of the difference amplifier, ultimately translating to an offset error.

The value of VSHUNT is the ground potential for the system load because VSHUNT is a low-side measurement. Therefore, a maximum value must be placed on VSHUNT. In this design, the maximum value for VSHUNT is set to 100 mV. Equation 2 calculates the maximum value of the shunt resistor given a maximum shunt voltage of 100 mV and maximum load current of 1 A.

Equation 2. GUID-05D54BA5-B4FC-4216-8246-60643609BD61-low.gif

The tolerance of RSHUNT is directly proportional to cost. For this design, a shunt resistor with a tolerance of 0.5% is selected. If greater accuracy is required, select a 0.1% resistor or better.

The load current is bidirectional; therefore, the shunt voltage range is –100 mV to +100 mV. This voltage is divided down by R1 and R2 before reaching the operational amplifier, U1A. Make sure that the voltage present at the noninverting node of U1A is within the common-mode range of the device. Use an operational amplifier, such as the TLVx387, that has a common-mode range that extends below the negative supply voltage. The offset error is minimal because the TLVx387 has a typical offset voltage of merely ±0.25 µV (±5 µV, maximum).

Given a symmetric load current of –1 A to +1 A, the voltage divider resistors, R5 and R6, must be equal. To be consistent with the shunt resistor, a tolerance of 0.5% is selected. To minimize power consumption, 10‑kΩ resistors are used.

To set the gain of the difference amplifier, the common-mode range and output swing of the TLVx387 must be considered. Equation 3 and Equation 4 depict the typical common-mode range and maximum output swing, respectively, of the TLVx387 given a 3.3‑V supply.

Equation 3. –100 mV < VCM < 3.4 V
Equation 4. 100 mV < VOUT < 3.2 V

The gain of the difference amplifier can now be calculated as shown in Equation 5.

Equation 5. GUID-87F5BC6C-B4DE-462E-9930-98B10C2A9C96-low.gif

The resistor value selected for R1 and R3 is 1 kΩ. 15.4 kΩ is selected for R2 and R4 because this number is the nearest standard value. Therefore, in this example, the calculated gain of the difference amplifier is 15.4 V/V.

The gain error of the circuit primarily depends on R1 through R4. As a result of this dependence, 0.1% resistors were selected. This configuration reduces the likelihood that the design requires a two-point calibration. A simple one-point calibration, if desired, removes the offset errors introduced by the 0.5% resistors.