SBVS401B June   2020  – August 2025 TLV740P

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Foldback Current Limit
      2. 6.3.2 Output Enable
      3. 6.3.3 Active Discharge
      4. 6.3.4 Undervoltage Lockout (UVLO) Operation
      5. 6.3.5 Dropout Voltage
      6. 6.3.6 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Device Functional Mode Comparison
      2. 6.4.2 Normal Operation
      3. 6.4.3 Dropout Operation
      4. 6.4.4 Disabled
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Recommended Capacitor Types
      2. 7.1.2 Input and Output Capacitor Requirements
      3. 7.1.3 Dropout Voltage
      4. 7.1.4 Exiting Dropout
      5. 7.1.5 Transient Response
      6. 7.1.6 Reverse Current
      7. 7.1.7 Power Dissipation (PD)
        1. 7.1.7.1 Estimating Junction Temperature
        2. 7.1.7.2 Recommended Area for Continuous Operation
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curves
    3. 7.3 Best Design Practices
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
      2. 7.5.2 Layout Examples
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 Device Nomenclature
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

4 Pin Configuration and Functions

Figure 4-1 DQN Package, 4-Pin X2SON (Top View)
TLV740 TLV740P DBV Package, 5-Pin SOT-23 (Top View)Figure 4-2 DBV Package, 5-Pin SOT-23 (Top View)
Table 4-1 Pin Functions
PIN TYPE DESCRIPTION
NAME NO.
X2SON SOT-23
EN 3 3 I Enable pin. Driving this pin to logic high enables the device; driving this pin to logic low disables the device. Do not float this pin. If not used, connect EN to IN.
GND 2 2 — Ground pin. This pin must be connected to ground on the board.
IN 4 1 I Input pin. For best transient response and to minimize input impedance, use the recommended value or larger ceramic capacitor from IN to ground; see the Recommended Operating Conditions table. Place the input capacitor as close to the input of the device as possible.
NC — 4 — No connect pin. This pin is not internally connected. Connect to ground for best thermal performance or leave floating.
OUT 1 5 O Regulated output pin. A 1-µF or greater effective capacitance is required from OUT to ground for stability. see the Recommended Operating Conditions table. For best transient response, use a 1-µF or larger ceramic capacitor from OUT to ground. Place the output capacitor as close to output of the device as possible.
Thermal pad — — The thermal pad is electrically connected to the GND pin. Connect the thermal pad to a large-area GND plane for improved thermal performance.