SBOS986E October   2019  – January 2022 TLV9151 , TLV9152 , TLV9154

PRODMIX  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information for Single Channel
    5. 6.5 Thermal Information for Dual Channel
    6. 6.6 Thermal Information for Quad Channel
    7. 6.7 Electrical Characteristics
    8.     14
    9. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  EMI Rejection
      2. 7.3.2  Thermal Protection
      3. 7.3.3  Capacitive Load and Stability
      4. 7.3.4  Common-Mode Voltage Range
      5. 7.3.5  Phase Reversal Protection
      6. 7.3.6  Electrical Overstress
      7. 7.3.7  Overload Recovery
      8. 7.3.8  Typical Specifications and Distributions
      9. 7.3.9  Packages With an Exposed Thermal Pad
      10. 7.3.10 Shutdown
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Low-Side Current Measurement
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 TINA-TI (Free Software Download)
        2. 11.1.1.2 TI Precision Designs
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Table 6-1 Table of Graphs
DESCRIPTION FIGURE
Offset Voltage Production Distribution Figure 6-1
Offset Voltage Drift Distribution Figure 6-2
Offset Voltage vs Temperature Figure 6-3, Figure 6-4
Offset Voltage vs Common-Mode Voltage Figure 6-5, Figure 6-6, Figure 6-7, Figure 6-8
Offset Voltage vs Power Supply Figure 6-9
Open-Loop Gain and Phase vs Frequency Figure 6-10
Closed-Loop Gain and Phase vs Frequency Figure 6-11
Input Bias Current vs Common-Mode Voltage Figure 6-12
Input Bias Current vs Temperature Figure 6-13
Output Voltage Swing vs Output Current Figure 6-14, Figure 6-15
CMRR and PSRR vs Frequency Figure 6-16
CMRR vs Temperature Figure 6-17
PSRR vs Temperature Figure 6-18
0.1-Hz to 10-Hz Noise Figure 6-19
Input Voltage Noise Spectral Density vs Frequency Figure 6-20
THD+N Ratio vs Frequency Figure 6-21
THD+N vs Output Amplitude Figure 6-22
Quiescent Current vs Supply Voltage Figure 6-23
Quiescent Current vs Temperature Figure 6-24
Open Loop Voltage Gain vs Temperature Figure 6-25
Open Loop Output Impedance vs Frequency Figure 6-26
Small Signal Overshoot vs Capacitive Load (100-mV Output Step) Figure 6-27, Figure 6-28
Phase Margin vs Capacitive Load Figure 6-29
No Phase Reversal Figure 6-30
Positive Overload Recovery Figure 6-31
Negative Overload Recovery Figure 6-32
Small-Signal Step Response (100 mV) Figure 6-33, Figure 6-34
Large-Signal Step Response Figure 6-35, Figure 6-36, Figure 6-37
Short-Circuit Current vs Temperature Figure 6-38
Maximum Output Voltage vs Frequency Figure 6-39
Channel Separation vs Frequency Figure 6-40
EMIRR vs Frequency Figure 6-41