Remote temperature sensing on the TMP4718 device measures very small voltages using very low currents, therefore noise at the device inputs must be minimized. Most applications using the TMP4718 have high digital content, with several clocks and logic-level transitions that create a noisy environment. The layout must adhere to the following guidelines:
- Place the TMP4718 device as close to the remote junction sensor as possible.
- Route the DP and DN traces next to each other and shield them from adjacent signals through the use of ground guard traces. If a multilayer PCB is used, bury these traces between the ground or V+ planes to shield them from extrinsic noise sources. 5-mil (0.127 mm) PCB traces are recommended.
- Minimize additional thermocouple junction induced offset voltage caused by copper-to-solder connections. If these junctions are used, make the same number and approximate locations of copper-to-solder connections in both the DP and DN connections to cancel any thermocouple effects.
- Use a 0.1-μF local bypass capacitor directly between the VDD and GND of the TMP4718 device. For optimum measurement performance, minimize filter capacitance between DP and DN to 3 nF or less. This capacitance includes any cable capacitance between the remote temperature sensor and the TMP4718 device. The external capacitor shall be placed as close to the DP and DN pin as possible.
- If the connection between the remote temperature sensor and the TMP4718 device is less than 8-in (20.32 cm) long, use a twisted-wire pair connection. For lengths greater than 8 inches, use a twisted, shielded pair with the shield grounded as close to the TMP4718 device as possible. Leave the remote sensor connection end of the shield wire open to avoid ground loops and 60-Hz pickup.
- Thoroughly clean and remove all flux residue in and around the pins of the TMP4718 device to avoid any leakage induced temperature measurement error.
- If series resistors are added, equal value shall be used for the DP and DN connections and the
value shall not be greater than 1 kΩ. Place the resistors as closed to the DP
and DN pins as possible.