SBOSA41A May   2023  – September 2023 TMP4718

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Revision History
  6. Device Comparison
  7. Pin Configuration and Functions
  8. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 I2C Interface Timing
    7. 7.7 Timing Diagrams
    8. 7.8 Typical Characteristics
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 1.2-V Logic Compatible Inputs
      2. 8.3.2 Series Resistance Cancellation
      3. 8.3.3 Device Initialization, Resistor Decoding, and Default Temperature Conversion
      4. 8.3.4 Adjustable Default T_CRIT High-Temperature Limit
      5. 8.3.5 ALERT and T_CRIT Output
      6. 8.3.6 Fault Queue
      7. 8.3.7 Filtering
      8. 8.3.8 One-Shot Conversions
    4. 8.4 Device Functional Modes
      1. 8.4.1 Interrupt and Comparator Mode
        1. 8.4.1.1 Interrupt Mode
        2. 8.4.1.2 Comparator Mode
        3. 8.4.1.3 T_CRIT Output
      2. 8.4.2 Shutdown Mode
      3. 8.4.3 Continuous Conversion Mode
    5. 8.5 Programming
      1. 8.5.1 Temperature Data Format
      2. 8.5.2 I2C and SMBus Interface
      3. 8.5.3 Device Address
      4. 8.5.4 Bus Transactions
        1. 8.5.4.1 Writes
        2. 8.5.4.2 Reads
      5. 8.5.5 SMBus Alert Mode
    6. 8.6 Register Map
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Writes

To write on the I2C bus, the controller sends a START condition on the bus with the address of the target, as well as the last bit (the R/W bit) set to 0, which signifies a write. The target acknowledges, letting the controller know it is ready. After this, the controller starts sending the register pointer followed by the register data to the target. The controller terminates the transmission with a STOP condition.

Writes to read-only registers or register locations outside of the register map will be ignored and the TMP4718 will NACK the data the controller tries to send.

Figure 8-12 shows an example of writing a single byte write communication. TMP4718 does not support multiple byte writes.

GUID-20210309-CA0I-NZKP-V02P-TLXSBZZHNHVL-low.gif Figure 8-12 Write to Single Register