SCDS394A March   2021  – October 2021 TMUX7462F

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Thermal Information
    4. 6.4  Recommended Operating Conditions
    5. 6.5  Electrical Characteristics (Global)
    6. 6.6  ±15 V Dual Supply: Electrical Characteristics
    7. 6.7  ±20 V Dual Supply: Electrical Characteristics
    8. 6.8  12 V Single Supply: Electrical Characteristics
    9. 6.9  36 V Single Supply: Electrical Characteristics
    10. 6.10 Typical Characteristics
  7. Parameter Measurement Information
    1. 7.1  On-Resistance
    2. 7.2  On-Leakage Current
    3. 7.3  Input and Output Leakage Current under Overvoltage Fault
    4. 7.4  Fault Response Time
    5. 7.5  Fault Recovery Time
    6. 7.6  Fault Flag Response Time
    7. 7.7  Fault Flag Recovery Time
    8. 7.8  Fault Drain Enable Time
    9. 7.9  Inter-Channel Crosstalk
    10. 7.10 Bandwidth
    11. 7.11 THD + Noise
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Flat ON-Resistance
      2. 8.3.2 Protection Features
        1. 8.3.2.1 Input Voltage Tolerance
        2. 8.3.2.2 Powered-Off Protection
        3. 8.3.2.3 Fail-Safe Logic
        4. 8.3.2.4 Overvoltage Protection and Detection
        5. 8.3.2.5 Latch-Up Immunity
        6. 8.3.2.6 EMC Protection
      3. 8.3.3 Overvoltage Fault Flags
      4. 8.3.4 Bidirectional Operation
    4. 8.4 Device Functional Modes
      1. 8.4.1 Normal Mode
      2. 8.4.2 Fault Mode
      3. 8.4.3 Truth Table
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Performance Plots
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
  • RRP|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Electrical Characteristics (Global)

at TA = 25°C (unless otherwise noted)
Typical at VDD = 15 V, VSS = –15 V, GND = 0 V (unless otherwise noted)
PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT
ANALOG SWITCH
VT Threshold voltage for fault detector 25°C 0.7 V
LOGIC INPUT/ OUTPUT
VIH High-level input voltage DR pin –40°C to +125°C 1.3 V
VIL Low-level input voltage DR pin –40°C to +125°C 0.8 V
IIH High-level input current VDR = logic high –40°C to +125°C 0.4 3 µA
IIL Low-level input current VDR = logic low –40°C to +125°C –1 –0.65 µA
VOL(FLAG) Low-level output voltage FF pin, IO = 5 mA –40°C to +125°C 0.35 V
POWER SUPPLY
VUVLO Undervoltage lockout (UVLO) threshold voltage (VDD – VSS) Rising edge, single supply –40°C to +125°C 5.1 5.8 6.4 V
Falling edge, single supply –40°C to +125°C 5 5.7 6.3 V
VHYS VDD Undervoltage lockout  (UVLO) hysteresis Single supply –40°C to +125°C 0.2 V
RD(OVP) Drain resistance to fault supply during overvoltage protection
when enabled by DR pin
25°C 40