SLOS942 April   2018 TPA3126D2

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      TPA3126 and TPA3116 Idle Current
      2.      Simplified Application Circuit
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 DC Electrical Characteristics
    6. 7.6 AC Electrical Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Gain Setting and Master and Slave
      2. 8.3.2  Input Impedance
      3. 8.3.3  Startup and Shutdown Operation
      4. 8.3.4  PLIMIT Operation
      5. 8.3.5  GVDD Supply
      6. 8.3.6  BSPx and BSNx Capacitors
      7. 8.3.7  Differential Inputs
      8. 8.3.8  Device Protection System
      9. 8.3.9  DC Detect Protection
      10. 8.3.10 Short-Circuit Protection and Automatic Recovery Feature
      11. 8.3.11 Thermal Protection
      12. 8.3.12 Device Modulation Scheme
        1. 8.3.12.1 BD Modulation
      13. 8.3.13 Efficiency: LC Filter Required with the Traditional Class-D Modulation Scheme
      14. 8.3.14 Ferrite Bead Filter Considerations
      15. 8.3.15 When to Use an Output Filter for EMI Suppression
      16. 8.3.16 AM Avoidance EMI Reduction
    4. 8.4 Device Functional Modes
      1. 8.4.1 Mono PBTL Mode
      2. 8.4.2 Mono BTL Mode (Single Channel Mode)
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Typical Application
        1. 9.1.1.1 Design Requirements
        2. 9.1.1.2 Detailed Design Procedure
          1. 9.1.1.2.1 Select the PWM Frequency
          2. 9.1.1.2.2 Select the Amplifier Gain and Master/Slave Mode
          3. 9.1.1.2.3 Select Input Capacitance
          4. 9.1.1.2.4 Select Decoupling Capacitors
          5. 9.1.1.2.5 Select Bootstrap Capacitors
        3. 9.1.1.3 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 Power Supply Mode
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Heat Sink Used on the EVM
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Related Documentation
    4. 12.4 Community Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.7 Typical Characteristics

fs = 400 kHz, Hybrid Mode, TPA3126D2EVM Tested With AP2722. (unless otherwise noted)
TPA3126D2 D002-SLOS992.gifFigure 1. Idle Current vs PVCC
TPA3126D2 D006_SLOS941.gifFigure 3. Total Harmonic Distortion + Noise (BTL) vs Frequency
TPA3126D2 D008_SLOS941.gifFigure 5. Total Harmonic Distortion + Noise (BTL) vs Output Power
TPA3126D2 D010_SLOS941.gifFigure 7. Total Harmonic Distortion + Noise (BTL) vs Output Power
TPA3126D2 D012_SLOS941.gifFigure 9. Output Power (BTL) vs PLIMIT Voltage
TPA3126D2 D014_SLOS941.gifFigure 11. Maximum Output Power (BTL) vs Supply Voltage
TPA3126D2 D016_SLOS941.gifFigure 13. Power Efficiency (BTL) vs Output Power
TPA3126D2 D001-SLOS992.gifFigure 15. Crosstalk vs Frequency
TPA3126D2 D020_SLOS941.gifFigure 17. Supply Ripple Rejection Ratio (BTL) vs Frequency
TPA3126D2 D022_SLOS941.gifFigure 19. Total Harmonic Distortion + Noise (PBTL) vs Output Power
TPA3126D2 D001_SLOS942.gifFigure 21. Power Efficiency (PBTL) vs Output Power
TPA3126D2 D0023_SLOS942.gifFigure 23. Total Harmonic Distortion + Noise (PBTL) vs Output Power
TPA3126D2 D005_SLOS941.gifFigure 2. Total Harmonic Distortion + Noise (BTL) vs Frequency
TPA3126D2 D007_SLOS941.gifFigure 4. Total Harmonic Distortion + Noise (BTL) vs Output Power
TPA3126D2 D009_SLOS941.gifFigure 6. Total Harmonic Distortion + Noise (BTL) vs Output Power
TPA3126D2 D011_SLOS941.gifFigure 8. Total Harmonic Distortion + Noise (BTL) vs Output Power
TPA3126D2 D013_SLOS941.gifFigure 10. Gain/Phase (BTL) vs Frequency
TPA3126D2 D015_SLOS941.gifFigure 12. Maximum Output Power (BTL) vs Supply Voltage
TPA3126D2 D017_SLOS941.gifFigure 14. Power Efficiency (BTL) vs Output Power
TPA3126D2 D019_SLOS941.gifFigure 16. Crosstalk vs Frequency
TPA3126D2 D021_SLOS941.gifFigure 18. Total Harmonic Distortion + Noise (PBTL) vs Frequency
TPA3126D2 D023_updated_SLOS941.gifFigure 20. Maximum Output Power (PBTL) vs Supply Voltage
TPA3126D2 D025_SLOS941.gifFigure 22. Supply Ripple Rejection Ratio (PBTL) vs Frequency
TPA3126D2 D004_SLOS942.gifFigure 24. Maximum Output Power (PBTL) vs Supply Voltage