SLIS125B December   2006  – December 2014 TPIC74100-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Dissipation Rating Table
    6. 6.6 Electrical Characteristics
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Switch-Mode Input/Output Pins (L1, L2)
      2. 7.3.2  Supply Pin (Vdriver)
      3. 7.3.3  Internal Supply Decoupling Pin (Vlogic)
      4. 7.3.4  Input Voltage Monitoring Pin (AIN)
      5. 7.3.5  Input Undervoltage Alarm Pin (AOUT)
      6. 7.3.6  Reset Delay Timer Pin (REST)
      7. 7.3.7  Reset Pin (RESET)
      8. 7.3.8  Main Regulator Output Pin (VOUT)
      9. 7.3.9  Low-Power-Mode Pin (CLP)
      10. 7.3.10 Switch-Output Pin (5Vg)
      11. 7.3.11 5Vg-Enable Pin (5Vg_ENABLE)
      12. 7.3.12 Slew-Rate Control Pins (SCR0, SCR1)
      13. 7.3.13 Modulator Frequency Setting (Pin Rmod)
      14. 7.3.14 Ground Pin (PGND)
      15. 7.3.15 Enable Pin (ENABLE)
      16. 7.3.16 Bootstrap Pins (Cboot1 and Cboot2)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Clock Modulator
      2. 7.4.2 Buck/Boost Transitioning
      3. 7.4.3 Buck SMPS
      4. 7.4.4 Boost SMPS
      5. 7.4.5 Extension of the Input Voltage Range on V(driver)
      6. 7.4.6 Low-Power Mode
      7. 7.4.7 Temperature and Short-Circuit Protection
      8. 7.4.8 Switch-Output Pin (5Vg) Current Limitation
      9. 7.4.9 Soft Start
  8. 8 Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Buck Mode
        2. 8.2.2.2 Boost Mode
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Switch-Mode Power Supply
        1. 10.1.1.1 Inductor
        2. 10.1.1.2 Filter Capacitors
        3. 10.1.1.3 Traces and Ground Plane
      2. 10.1.2 Package and PCB Land Configuration for a Multilayer PCB
      3. 10.1.3 Multilayer (Side View)
      4. 10.1.4 Single-Layer
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9 Power Supply Recommendations

The input decoupling capacitors and bootstrap capacitor must be located as close as possible to the device. Ensure that the input power supply is clean. To minimize voltage ripple on the output due to transients, it is recommended to use a low-ESR capacitor on the VOUT line. The L and C component values are system application dependent for EMI consideration. TI recommends using a low EMI Inductor with a ferrite-type closed core.